NDLI: Comparison of ESD protection capability of SOI and bulk CMOS output buffers

Content Provider	IEEE Xplore Digital Library
Author	Mansun Chan Yuen, S.S. Zhi-Jian Ma Hui, K.Y. Ko, P.K. Chenming Hu
Copyright Year	1994
Description	Author affiliation: Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA (Mansun Chan; Yuen, S.S.; Zhi-Jian Ma; Hui, K.Y.; Ko, P.K.; Chenming Hu)
Abstract	ESD protection capability of SOI CMOS output buffers has been studied with human body model (HBM) stresses of both positive and negative polarity. Experimental results show that the ESD discharge current is absorbed by the NMOSFET alone. Unlike bulk technologies where the bi-directional ESD failure voltages are limited by positive polarity stresses, SOI circuits display a more serious reliability problem in handling negative ESD discharge current. Bulk NMOS output buffers fabricated on the substrate of the same SOI wafers, after etching away the buried oxide, have been used to compare the ESD protection capability between bulk and SOI technologies. The ESD voltage sustained by these "bulk" NMOS buffers is about twice the voltage sustained by conventional SOI NMOS buffers. This scheme is proposed as an alternative ESD protection for SOI circuits. The effectiveness of ESD resistant design strategies developed in bulk-substrate technologies when transferred to SOI circuits is also discussed in this paper.
Starting Page	292
Ending Page	298
File Size	685722
Page Count	7
File Format	PDF
ISBN	0780313577
DOI	10.1109/RELPHY.1994.307821
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1994-04-11
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Electrostatic discharge Protection Voltage MOS devices Stress Humans Biological system modeling Semiconductor device modeling MOSFET circuits CMOS technology
Content Type	Text
Resource Type	Article

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