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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Veksler, D. Bersuker, G. Watkins, M.B. Shluger, A. |
| Copyright Year | 2014 |
| Description | Author affiliation: Univ. Coll. London, London, UK (Watkins, M.B.; Shluger, A.) || SEMATECH, Albany, NY, USA (Veksler, D.; Bersuker, G.) |
| Abstract | We investigate a possibility that changes of electrical characteristics of the nFETs high-k gate stacks under moderate voltage stresses are induced primarily by a reversible activation of the pre-existing defects rather than generation of new structural defects. These electrically silent pre-cursor defects become responsible for measured stress-induced instabilities of transistor parameters after activation. It is demonstrated that the experimental stress time dependency of the threshold voltage, leakage current, charge pumping (CP) current can be reproduced, considering trap activation/deactivation as a multi-phonon assisted electron capture/emission. Ab initio simulations, employed to identify the atomic configuration of these pre-cursor defects, point to the oxygen vacancies in a region of the $SiO_{2}$ interfacial layer adjacent to the $HfO_{2}$ film as potential candidates. |
| File Size | 1013609 |
| File Format | |
| ISBN | 9781479933174 |
| ISSN | 19381891 |
| DOI | 10.1109/IRPS.2014.6860663 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2014-06-01 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Stress Hafnium compounds Electron traps Silicon Logic gates Stress measurement Lattices High-k gate stack Charge Pumping SILC PBTI Defects |
| Content Type | Text |
| Resource Type | Article |
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