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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Seon-Ho Han Yong-Sik Youn Hyun-Kyu Yu Mun-Yang Park |
| Copyright Year | 2003 |
| Description | Author affiliation: Electron. & Telecommun. Res. Inst., Daejeon, South Korea (Seon-Ho Han; Yong-Sik Youn; Hyun-Kyu Yu; Mun-Yang Park) |
| Abstract | A frequency synthesizer including a integrated quadrature VCO and a few novel circuits is presented in a 0.18 um CMOS technology. A 16/17 dual modulus prescaler operates up to 5.1 GHz due to the fast (about 10 GHz) operation of the proposed complementary clocking (CC) dynamic flip-flop. Also, a phase frequency detector (PFD) utilizing the charge pump current feedback, generates low spurious tones irrespective of the temperature or supply variations. The measured reference spur is less than -120 dBc with a second order loop-filter of which bandwidth equals f/sub REF//50. The measured out- and in-band phase noise of the quadrature VCO is -140 dBc@8 MHz and -82dBc@10 kHz, respectively. With a 1.8 V power supply, the current consumption of the overall frequency synthesizer is only 7.5 mA except 50 /spl Omega/ driving buffers. |
| Sponsorship | IEEE Microwave Theory & Tech. Soc. IEEE Electron. Device Soc. IEEE Solid States Circuits Soc |
| Starting Page | 307 |
| Ending Page | 310 |
| File Size | 277057 |
| Page Count | 4 |
| File Format | |
| ISBN | 0780376943 |
| ISSN | 15292517 |
| DOI | 10.1109/RFIC.2003.1213950 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2003-06-09 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Frequency synthesizers Voltage-controlled oscillators CMOS technology Phase frequency detector Integrated circuit technology Clocks Flip-flops Charge pumps Feedback Temperature |
| Content Type | Text |
| Resource Type | Article |
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