NDLI: Hardware-In-the-Loop Simulation of Power Drives with RT-LAB

Content Provider	IEEE Xplore Digital Library
Author	Dufour, C. Abourida, S. Belanger, J.
Copyright Year	2005
Description	Author affiliation: Opal-RT Technologies inc., 1751 Richardson, #2525, Montreal (Quebec), H3K 1G6, Canada, christian.dufour@opal-rt.com (Dufour, C.)
Abstract	This paper presents the RT-LAB Electrical Drive Simulator technology along with practical applications. The RT-LAB simulation software enables the parallel simulation of power drives and electric circuits on clusters of PC running QNX or RT-Linux operating systems at sample time below 10 μs. Using standard Simulink models including SimPowerSystems models, RT-LAB build computation and communication tasks necessary to make parallel simulation of electrical systems with standard off-the-shelf PCs and communication links like InfiniBand. To accommodate the high bandwidth of electrical systems, the RT-LAB Electrical Drive Simulator comes with special Simulink-based modeling tools, namely ARTEMIS and RT-Events that permits real-time simulation of electrical systems at practical time step of 10 μs but with sub-μs equivalent precision through the use of interpolation techniques. For power drives with even higher bandwidth, RT-LAB XSG permits simulation of PMSM drive at 1 μs on FPGA with VHDL code generated from Xilinx System Generator.
Starting Page	1646
Ending Page	1651
File Size	3274886
Page Count	6
File Format	PDF
ISBN	0780392965
DOI	10.1109/PEDS.2005.1619952
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2005-11-28
Publisher Place	Malaysia
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Computational modeling Circuit simulation Power system modeling Communication standards Bandwidth Power generation Application software Operating systems Concurrent computing Personal communication networks FPGA simulation Hardware-in-the-loop simulation Motor Drives Power Electronics Real-Time Simulation
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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