NDLI: ESD Protection of NDMOS in 0.18μm High-Voltage CMOS Technology for Automotive Applications

Content Provider	IEEE Xplore Digital Library
Author	Steinbeck, L. Prohl, U. Frank, M. Konrad, A. Ellmers, C. Uhlig, T.
Copyright Year	2008
Description	Author affiliation: X-FAB Dresden GmbH & Co. KG, Dresden (Steinbeck, L.; Prohl, U.; Ellmers, C.; Uhlig, T.) \|\| 2X-FAB Semiconductor Foundries AG, Haarbergstrasse 67, 99097 Erfurt, Germany (Frank, M.; Konrad, A.)
Abstract	The snapback trigger voltage of the NDMOS in a 0.18 μm automotive smart power technology is strongly reduced at large gate bias. This behavior of the deep-submicron multi-resurf NDMOS, which makes its ESD protection difficult and limits its electrical safe operating area, and the influence of various device modifications are investigated by TCAD simulation. SCR-based ESD protection schemes for I/O and power supply protection are presented. For supply protection the SCR is modified to increase its holding voltage. The ability to protect the NDMOS at non-zero gate bias is discussed.
Starting Page	221
Ending Page	224
File Size	295075
Page Count	4
File Format	PDF
ISBN	9781424415328
DOI	10.1109/ISPSD.2008.4538938
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2008-05-18
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	CMOS technology Electrostatic discharge Automotive applications Voltage Thyristors Power system protection Pins Automotive engineering System testing Trigger circuits
Content Type	Text
Resource Type	Article

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