NDLI: A Class-D outphasing RF amplifier with harmonic suppression in 90nm CMOS

Content Provider	IEEE Xplore Digital Library
Author	Fritzin, J. Svensson, C. Alvandpour, A.
Copyright Year	2010
Description	Author affiliation: Division of Electronic Devices, Department of Electrical Engineering, Linköping University, SE-581 83 Linköping, Sweden (Fritzin, J.; Svensson, C.; Alvandpour, A.)
Abstract	This paper presents a low-power Class-D stage featuring a new harmonic reduction technique, which cancels the $3^{rd}$ harmonic and reduces the $5^{th}$ harmonic. The technique creates a voltage level of V/2 from a single supply voltage to shape the drain voltage, uses only digital circuits and eliminates the short-circuit current present in inverter-based Class-D stages. From a single Class-D stage operating at 900MHz, the measured output power is +5.1dBm with Drain Efficiency (DE) and Power-Added Efficiency (PAE) of 73% and 59% for a 1.2V supply, while $2^{nd}$ to $4^{th}$ harmonics are measured to be −37dBc without any filtering. Connecting two Class-D stages to a PCB-mounted transformer in an outphasing configuration, the overall amplifier is linear enough to amplify EDGE 8-PSK and WCDMA modulated signals at 900MHz without pre-distortion of the input signals or any other linearization technique.
Starting Page	310
Ending Page	313
File Size	690610
Page Count	4
File Format	PDF
ISBN	9781424466627
ISSN	19308833
e-ISBN	9781424466641
DOI	10.1109/ESSCIRC.2010.5619706
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2010-09-14
Publisher Place	Spain
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Power harmonic filters Harmonic analysis Power amplifiers Radio frequency Multiaccess communication CMOS integrated circuits harmonic distortion CMOS amplifiers power amplifiers
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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