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Content Provider | IEEE Xplore Digital Library |
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Author | Mhaya, N. Jerraya, A.A. |
Copyright Year | 1987 |
Description | Author affiliation: TIM3-INPG/IMAG laboratory., 46 Avenue Felix Viallet, 38031 GRENOBLE Cedex. FRANCE. (Mhaya, N.; Jerraya, A.A.) |
Abstract | This paper describes the SYCO Control Section Compiler (CPC). The SYCO silicon compiler generates microprocessor-like circuits. Each circuit is constitueted of a data path (DP) and a control section (CS) which is a stack of control slices. The SYCO system makes use of the CPC to produce the control section from a high level description. CPC handles an hierarchical control section and involves efficient optimization mechanism. The present version of the CPC generates each control slice using a PLA. The compilation of the algorithmic description of each control slice is composed of three steps: the state table generation, the logic optimization and the PLA generation. CPC is available, the paper indicates the results of the 6502 control section compilation. |
Starting Page | 249 |
Ending Page | 252 |
File Size | 634443 |
Page Count | 4 |
File Format | |
ISBN | 3800715341 |
Language | English |
Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Publisher Date | 1987-09-23 |
Publisher Place | Germany |
Access Restriction | Subscribed |
Rights Holder | Berlin: VDE-Verlag, 1987 |
Subject Keyword | Communication system control Data mining Silicon compiler Programmable logic arrays Control system synthesis Circuit synthesis Control systems Process design Data structures Laboratories |
Content Type | Text |
Resource Type | Article |
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