NDLI: High-PSR CMOS LDO with embedded ripple feedforward and energy-efficient bandwidth extension

Content Provider	IEEE Xplore Digital Library
Author	Chen, Liuyan Cheng, Qi Guo, Jianping Chen, Min
Copyright Year	2015
Description	Author affiliation: School of Physics and Engineering, Sun Yat-sen University, Guangzhou, China (Chen, Liuyan; Cheng, Qi; Guo, Jianping; Chen, Min)
Abstract	A CMOS low-dropout regulator (LDO) with high power-supply ripple rejection (PSR) across a wide frequency range is presented and designed in 0.18-μm CMOS technology. Targeting for the application of energy-autonomous biomedical implants, it has a very simple structure and features low power consumption. The high PSR in low frequency range is realized by the proposed embedded supply ripple feed-forward technique. Moreover, the PSR bandwidth is improved up to several MHz by adopting an energy-efficient double zero compensation network. With a 4.7-μF ceramic output capacitor, in the maximum loading condition (i.e., 25 mA), the simulated PSR is no less than −86 dB from DC to 10 kHz, and better than −63 dB up to 10 MHz. The quiescent current is just 10 μA. The line and load regulations are 0.5 mV/V @ 25-mA loading and 0.14 mV/mA @ 1.3-V Vin, respectively. The overshoot and undershoot voltages are less than 2 mV when loading current changes between 0 and 25 mA.
Starting Page	384
Ending Page	389
File Size	366331
Page Count	6
File Format	PDF
ISSN	21641706
e-ISBN	9781467390941
DOI	10.1109/SOCC.2015.7406988
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2015-09-08
Publisher Place	China
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Bandwidth Logic gates Implants Capacitors Power transistors Poles and zeros Loading biomedical implants Low-dropout regulator (LDO) power-supply ripple rejection (PSR) wide bandwidth embedded feed-forward energy autonomous
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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