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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Barbir, A.O. Aravena, J.L. Arfaoui, K. |
| Copyright Year | 1991 |
| Description | Author affiliation: Comput. Sci., Western Carolina Univ., Cullowhee, NC, USA (Barbir, A.O.) |
| Abstract | The authors present a systematic method for increasing the efficiency of a class of systolic arrays implementing unary matrix operations. The proposed technique is primarily an analysis tool that has important applications in the design of computing structures with reduced computational complexity. The method uses the concept of a timing graph to display the evolution of computations as a function of the compute cycle. In an extension of previous results the concept of timing graph decoupling is introduced as a procedure to determine structured sparsity patterns that can be executed more efficiently in a dense array. The technique is applied to LU and QR decomposition arrays. |
| Starting Page | 44 |
| Ending Page | 48 |
| File Size | 383403 |
| Page Count | 5 |
| File Format | |
| ISBN | 0818624701 |
| ISSN | 10586393 |
| DOI | 10.1109/ACSSC.1991.186411 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 1991-11-04 |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Sparse matrices Systolic arrays Timing Computer displays Application software Concurrent computing Design methodology Matrix decomposition Computer science Very large scale integration |
| Content Type | Text |
| Resource Type | Article |
| Subject | Signal Processing Computer Networks and Communications |
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