NDLI: Synthesizing self-testable filters via scaling and redundant operator elimination

Content Provider	IEEE Xplore Digital Library
Author	Goodby, L. Orailoglu, A.
Copyright Year	1995
Description	Author affiliation: Dept. of Electr. & Comput. Eng., California Univ., San Diego, La Jolla, CA, USA (Goodby, L.)
Abstract	A synthesis-based approach to improving the testability of digital filters is presented, with the aim of producing designs that achieve very high fault coverage under low-overhead built-in self-test methodologies. The synthesis-based approach permits high coverages to be achieved without the addition of special test hardware or other manipulation of the gate-level netlist. The testability of a design is enhanced at the register-transfer level (RTL), prior to synthesis. Using scaling as a redundancy elimination technique, it is possible to reduce the area required by a design, as well as identify further redundancies that can be eliminated through the automatic selection of optimized RTL structures drawn from a parameterized VHDL library.
Starting Page	132
Ending Page	136
File Size	529086
Page Count	5
File Format	PDF
ISBN	0818673702
ISSN	10586393
DOI	10.1109/ACSSC.1995.540527
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1995-10-30
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Built-in self-test Redundancy Signal design Finite impulse response filter Automatic testing Digital signal processing Signal synthesis Logic testing Adders Design engineering
Content Type	Text
Resource Type	Article
Subject	Signal Processing Computer Networks and Communications

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