NDLI: A new dimension of parallelism in ultra high throughput LDPC decoding

Content Provider	IEEE Xplore Digital Library
Author	Schlafer, P. Wehn, N. Alles, M. Lehnigk-Emden, T.
Copyright Year	2013
Description	Author affiliation: Creonic GmbH, Kaiserslautern, Germany (Alles, M.; Lehnigk-Emden, T.) \|\| Microelectron. Syst. Design Res. Group, Univ. of Kaiserslautern, Kaiserslautern, Germany (Schlafer, P.; Wehn, N.)
Abstract	In modern communication systems the required data rates are continuously increasing. High speed transmissions can easily generate throughputs far beyond 1 Tbit/s. To ensure error free communication, channel codes like Low-Density Parity Check (LDPC) codes are utilized. However state-of-the-art LDPC decoders can process only data rates in the range of 10 to 50 Gbit/s. This results in a gap in decoder performance which has to be closed. Therefore we propose a new ultra high speed LDPC decoder architecture. We show that our architecture significantly reduces the routing congestion which poses a big problem for fully parallel, high speed LDPC decoders. The presented 65nm ASIC implementation runs at 257 MHz and consumes an area of 12 $mm^{2}The$ resulting system throughput is 160 Gbit/s, it is the fastest LDPC decoder which has been published up to now. At the same time we show that extremely parallel architectures do not only increase the maximum throughput but also increase area and power efficiency in comparison to state-of-the-art decoders.
Starting Page	153
Ending Page	158
File Size	347049
Page Count	6
File Format	PDF
ISBN	9781467362382
ISSN	21623562
DOI	10.1109/SiPS.2013.6674497
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2013-10-16
Publisher Place	Taiwan
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
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3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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