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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Ramachandran, A. Vienne, J. Van Der Wijngaart, R. Koesterke, L. Sharapov, I. |
| Copyright Year | 2013 |
| Description | Author affiliation: Intel Corp., Santa Clara, CA, USA (Van Der Wijngaart, R.; Sharapov, I.) || Univ. of Texas at Dallas, Dallas, TX, USA (Ramachandran, A.) || Texas Adv. Comput. Center, Univ. of Texas at Austin, Austin, TX, USA (Vienne, J.; Koesterke, L.) |
| Abstract | NAS parallel benchmarks (NPB) are a set of applications commonly used to evaluate parallel systems. We use the NPB-OpenMP version to examine the performance of the Intel's new Xeon Phi co-processor and focus in particular on the many core aspect of the Xeon Phi architecture. A first analysis studies the scalability up to 244 threads on 61 cores and the impact of affinity settings on scaling. It also compares performance characteristics of Xeon Phi and traditional Xeon CPUs. The application of several well-established optimization techniques allows us to identify common bottlenecks that can specifically impede performance on the Xeon Phi but are not as severe on multi-core CPUs. We also find that many of the OpenMP-parallel loops are too short (in terms of the number of loop iterations) for a balanced execution by 244 threads. New or redesigned benchmarks will be needed to accommodate the greatly increased number of cores and threads. At the end, we summarize our findings in a set recommendations for performance optimization for Xeon Phi. |
| Starting Page | 736 |
| Ending Page | 743 |
| File Size | 489179 |
| Page Count | 8 |
| File Format | |
| ISBN | 9780769551173 |
| ISSN | 01903918 |
| DOI | 10.1109/ICPP.2013.87 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2013-10-01 |
| Publisher Place | France |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Benchmark testing Vectors Bridges Instruction sets Hardware Computer architecture Optimization Performance analysis Parallel programming Multicore processing |
| Content Type | Text |
| Resource Type | Article |
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