NDLI: Memory coloring: a compiler approach for scratchpad memory management

Content Provider	IEEE Xplore Digital Library
Author	Lian Li Lin Gao Jingling Xue
Copyright Year	2005
Description	Author affiliation: Sch. of Comput. Sci. & Eng., New South Wales Univ., Sydney, NSW, Australia (Lian Li; Lin Gao; Jingling Xue)
Abstract	Scratchpad memory (SPM), a fast software-managed on-chip SRAM, is now widely used in modern embedded processors. Compared to hardware-managed cache, it is more efficient in performance, power and area cost, and has the added advantage of better time predictability. This paper introduces a general-purpose compiler approach, called memory coloring, to efficiently allocating the arrays in a program to an SPM. The novelty of our approach lies in partitioning an SPM into a "register file", splitting the live ranges of arrays to create potential data transfer statements between the SPM and off-chip memory, and finally, adapting an existing graph-colouring algorithm for register allocation to assign the arrays in the program into the register file. Our approach is efficient due to the practical efficiency of graph-colouring algorithms. We have implemented this work in SUIF and machSUIF. Preliminary results over benchmarks show that our approach represents a promising solution to automatic SPM management.
Starting Page	329
Ending Page	338
File Size	289766
Page Count	10
File Format	PDF
ISBN	076952429X
ISSN	1089795X
DOI	10.1109/PACT.2005.27
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2005-09-17
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Memory management Scanning probe microscopy Program processors Registers Adaptive arrays Australia Random access memory Costs Partitioning algorithms Application software
Content Type	Text
Resource Type	Article
Subject	Theoretical Computer Science Hardware and Architecture Software

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3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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