NDLI: Performance analysis of system overheads in TCP/IP workloads

Content Provider	IEEE Xplore Digital Library
Author	Binkert, N.L. Hsu, L.R. Saidi, A.G. Dreslinski, R.G. Schultz, A.L. Reinhardt, S.K.
Copyright Year	2005
Description	Author affiliation: EECS Dept., Michigan Univ., Ann Arbor, MI, USA (Binkert, N.L.; Hsu, L.R.; Saidi, A.G.; Dreslinski, R.G.; Schultz, A.L.; Reinhardt, S.K.)
Abstract	Current high-performance computer systems are unable to saturate the latest available high-bandwidth networks such as 10 Gigabit Ethernet. A key obstacle in achieving 10 gigabits per second is the high overhead of communication between the CPU and network interface controller (NIC), which typically resides on a standard I/O bus with high access latency. Using several network-intensive benchmarks, we investigate the impact of this overhead by analyzing the performance of hypothetical systems in which the NIC is more closely coupled to the CPU, including integration on the CPU die. We find that systems with high-latency NICs spend a significant amount of time in the device driver. NIC integration can substantially reduce this overhead, providing significant throughput benefits when other CPU processing is not a bottleneck. NIC integration also enables cache placement of DMA data. This feature has tremendous benefits when pay-loads are touched quickly, but potentially can harm performance in other situations due to cache pollution.
Starting Page	218
Ending Page	228
File Size	214266
Page Count	11
File Format	PDF
ISBN	076952429X
ISSN	1089795X
DOI	10.1109/PACT.2005.35
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2005-09-17
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Performance analysis TCPIP Computer networks Ethernet networks Network interfaces Communication system control Communication standards Delay Throughput Pollution
Content Type	Text
Resource Type	Article
Subject	Theoretical Computer Science Hardware and Architecture Software

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