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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Juurlink, B. Tcheressiz, D. Vassiliadis, S. Wijshoff, H.A.G. |
| Copyright Year | 2001 |
| Description | Author affiliation: Comput. Eng. Lab., Delft Univ. of Technol., Netherlands (Juurlink, B.) |
| Abstract | An architectural paradigm designed to accelerate streaming operations on mixed-width data is presented and evaluated. The described Complex Streamed Instruction (CSI) set contains instructions that process data streams of arbitrary length. The number of bits or elements that will be processed in parallel is therefore not visible to the programmer, so no recompilation is needed in order to benefit from a wider datapath. CSI also eliminates many overhead instructions (such as instructions needed for data alignment and reorganization) often needed in applications utilizing media ISA extensions such as MMX and VIS by replacing them with a hardware mechanism. Simulation results using several multimedia kernels demonstrate that CSI provides a factor of up to 9.9 (4.0 on average) performance improvement when compared to Sun's VIS extension. For complete applications, the performance gain is 9% to 36% with an average of 20%. |
| Starting Page | 73 |
| Ending Page | 82 |
| File Size | 979652 |
| Page Count | 10 |
| File Format | |
| ISBN | 0769513638 |
| ISSN | 1089796X |
| DOI | 10.1109/PACT.2001.953289 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2001-09-08 |
| Publisher Place | Spain |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Instruction sets Hardware Data engineering Design engineering Laboratories Acceleration Kernel Sun Multimedia systems Parallel processing |
| Content Type | Text |
| Resource Type | Article |
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