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| Content Provider | IEEE Xplore Digital Library | 
|---|---|
| Author | Rui Chu Nong Xiao Lei Chen Xicheng Lu | 
| Copyright Year | 2007 | 
| Description | Author affiliation: Nat. Lab. for Parallel & Distrib. Process., Changsha (Rui Chu; Nong Xiao) | 
| Abstract | As an innovative distributed computing technique for sharing the memory resources in high-speed network, RAM Grid exploits the distributed free nodes, and provides remote memory for the nodes which are short of memory. One of the RAM Grid systems named DRACO, tries to provide cooperative caching to improve the performance of the user node which has mass disk I/O but lacks local memory. However, the performance of DRACO is constrained with the network communication cost. In order to hide the latency of remote memory access and improve the caching performance, we proposed using push- based prefetching to enable the caching providers to push the potential useful memory pages to the user nodes. Specifically, for each caching provider, it employs sequential pattern mining techniques, which adapts to the characteristics of memory page access sequences, on locating useful memory pages for prefetching. We have verified the effectiveness of the proposed method through system analysis and trace-driven simulations. | 
| Starting Page | 1 | 
| Ending Page | 8 | 
| File Size | 253025 | 
| Page Count | 8 | 
| File Format | |
| ISBN | 9781424418893 | 
| ISSN | 15219097 | 
| DOI | 10.1109/ICPADS.2007.4447770 | 
| Language | English | 
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) | 
| Publisher Date | 2007-12-05 | 
| Publisher Place | Taiwan | 
| Access Restriction | Subscribed | 
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) | 
| Subject Keyword | Prefetching Cooperative caching Random access memory Read-write memory Delay High-speed networks File systems Costs Laboratories Distributed processing | 
| Content Type | Text | 
| Resource Type | Article | 
| Subject | Hardware and Architecture | 
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