NDLI: Multilevel Task Parallelism Exploitation on Asymmetric Sets of Tasks and When Using Third-Party Tools

Content Provider	IEEE Xplore Digital Library
Author	Neves, D.T.
Copyright Year	2015
Description	Author affiliation: Dept. of Inf., Univ. of Minho, Braga, Portugal (Neves, D.T.)
Abstract	To harness the performance potential of current multicore processors, a multitude of algorithms, frameworks and libraries have been developed. Nevertheless, it is still extremely difficult to take advantage of the full potential of multicore processors. Moreover, in the presence of asymmetric sets of tasks, and/or when using third-party tools, this problem would only aggravate. In this paper, we present a software design and two algorithms to enable multilevel task parallelism exploitation on asymmetric sets of tasks and when using third-party tools. The proposed software design along with both algorithms allow, in a seamlessly way, the efficient exploitation of coarse-grained-inter-task-and fine-grained-intra-task-parallelism. Thus, it becomes possible to make a better and transparent usage of the performance potential of current multicore processors on shared-memory systems. To assess the feasibility and the benefit of applying the proposed software design along with both algorithms, we used three irregular applications from Phylogenetics-real world problems-, and several input data sets with different characteristics. Our studies show ground-breaking results in terms of the achieved speedups and that scalability is not impaired.
Starting Page	46
Ending Page	55
File Size	343389
Page Count	10
File Format	PDF
ISBN	9781467371476
e-ISBN	9781467371483
DOI	10.1109/ISPDC.2015.13
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2015-06-29
Publisher Place	Cyprus
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Parallel processing Software algorithms Software design Algorithm design and analysis DNA Multicore processing Program processors Phylogenetics Parallel Programming Multicore Processors Shared-Memory Systems Multilevel Task Parallelism Exploitation Asymmetric Sets of Tasks Third-Party Tools
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in