NDLI: Speculative Computing of Recursive Functions Taking Values from Finite Sets

Content Provider	IEEE Xplore Digital Library
Author	Brzuszek, M. Sasak, A. Turek, M.
Copyright Year	2008
Description	Author affiliation: Inst. of Phys., Maria Curie Sklodowska Univ., Lublin, Poland (Turek, M.) \|\| Inst. of Comput. Sci., Maria Curie Sklodowska Univ., Lublin, Poland (Brzuszek, M.; Sasak, A.)
Abstract	This paper concerns speculative parallelization as a method of improving computations efficiency and also as a method of reducing the problem solving time with reference to its sequential version. Speculative parallelization is proposed for a particular class of problems, described as recursive functions taking values from finite sets. It refers to speculative execution of consecutive iteration steps. Each of them, except the first one, depends on the preceding iteration step yet before it ends. Assuming that in the sequential version one iteration is performed in one linear execution time step (hereinafter referred to as computational step), then the aim of the speculative parallelization is the reduction of the total number of computational steps and thus execution of more than one iteration in one time step. The essence of the problem is that we assume some mapping schemes of arguments into the set of possible values of the function in speculative computing, i.e. there exists precise information about the possible values that the function can take for particular arguments. This paper presents simulation results for the chosen mapping schemes, illustrating how the number of steps, required to compute the value of the function for the given argument, depends on the structure of the mapping scheme and on the number of used parallel threads.
Starting Page	57
Ending Page	64
File Size	281837
Page Count	8
File Format	PDF
ISBN	9780769534725
DOI	10.1109/ISPDC.2008.23
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2008-07-01
Publisher Place	Poland
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Concurrent computing Yarn Distributed computing Problem-solving Computational modeling Physics computing Computer science Parallel processing Hardware Velocity measurement parallel programming speculative parallelization thread-level speculation recursive functions
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

A library for parallel thread-level speculation

Speculative synchronization and thread management for fine granularity threads

Scalable Transactional Memory Architecture Supporting Speculative Parallelization

TALM: A Hybrid Execution Model with Distributed Speculation Support

Heuristics for profile-driven method-level speculative parallelization

Thread-Level Value Speculation for Image-Processing Applications

Loop Selection to Boost Thread Level Speculation Parallelism in Chip Multiprocessor Systems

A Lightweight Model for Software Thread-Level Speculation (TLS)

A Thread Partitioning Method for Speculative Multithreading

Speculative Computing of Recursive Functions Taking Values from Finite Sets

Similar Documents

A library for parallel thread-level speculation

Speculative synchronization and thread management for fine granularity threads

Scalable Transactional Memory Architecture Supporting Speculative Parallelization

TALM: A Hybrid Execution Model with Distributed Speculation Support

Heuristics for profile-driven method-level speculative parallelization

Thread-Level Value Speculation for Image-Processing Applications

Loop Selection to Boost Thread Level Speculation Parallelism in Chip Multiprocessor Systems

A Lightweight Model for Software Thread-Level Speculation (TLS)

A Thread Partitioning Method for Speculative Multithreading

Speculative Computing of Recursive Functions Taking Values from Finite Sets