NDLI: Optimized Communication Control in Programs for Dynamic Look-Ahead Reconfigurable SoC Systems

Content Provider	IEEE Xplore Digital Library
Author	Laskowski, E. Tudruj, M.
Copyright Year	2008
Description	Author affiliation: Inst. of Comput. Sci., Polish Acad. of Sci., Warsaw, Poland (Laskowski, E.; Tudruj, M.)
Abstract	The paper presents a new kind of parallel embedded systems implemented in system on chip (SoC) technology, in which inter-processor communication infrastructure is dynamically run-time adjustable to application program requirements. The new system architecture assumes processors with a large number of autonomous communication links, which enables the look-ahead inter-processor connection reconfiguration that overlaps with current program execution including data communication. Dynamic connection reconfiguration pattern is determined at compile-time, as a result of application program graphs analysis. Algorithms for task scheduling and program decomposition into sections executed with the dynamic look-ahead created connections of processor links are presented. Experimental results with structuring of parallel numerical programs of fast Fourier transformation (FFT) are presented. The experiments compare program structuring quality of the look ahead connection reconfiguration in a single crossbar switch but with the use of multiple link subsets intergeably reconfigured in advance with the quality of reconfiguration in a single crossbar switch based on classical on-request approach.
Starting Page	293
Ending Page	299
File Size	288501
Page Count	7
File Format	PDF
ISBN	9780769534725
DOI	10.1109/ISPDC.2008.54
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2008-07-01
Publisher Place	Poland
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Communication system control Control systems Switches Embedded system System-on-a-chip Paper technology Runtime Data communication Pattern analysis Scheduling algorithm parallel systems reconfigurable systems system on chip inter-processor communication
Content Type	Text
Resource Type	Article

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