NDLI: A PCI interface with four 2 Gbit/s serial optical links

Content Provider	IEEE Xplore Digital Library
Author	Iwanski, W. Haas, S. Joos, M.
Copyright Year	2004
Description	Author affiliation: Henryk Niewodniczanski Inst. of Nucl. Phys., Polish Acad. of Sci., Krakow, Poland (Iwanski, W.)
Abstract	A reconfigurable PCI interface card (FILAR) with four on-board high-speed serial optical links has been developed for application in DAQ and test systems. FILAR cards, installed in low cost PCs, are currently being used in the combined test-beam of the ATLAS experiment at CERN as well as in several laboratory set-ups. The hardware and firmware design of the module and results from performance measurements are presented. The four on-board 2 Gbit/s serial optical links conform to the S-LINK specification and are compatible with the readout link (ROL) implementation for the ATLAS experiment. The board design is largely based on FPGAs and the firmware uses a commercial 64-bit/66 MHz PCI IP core for the bus interface. Different firmware versions were developed which can be used to configure the hardware as either a data source or a destination card. Design optimizations have been made during the development cycle of the firmware to maximize the data throughput and reduce the PCI bus overhead as well as the CPU load. In a PC with multiple PCI bus segments, an aggregate data throughput of over 1.7 Gbyte/s has been measured and transfer rates of more than 100 kHz for 1 Kbyte data fragments have been achieved.
Starting Page	1535
Ending Page	1539
File Size	1261862
Page Count	5
File Format	PDF
ISBN	0780387007
ISSN	10823654
e-ISBN	0780387015
DOI	10.1109/NSSMIC.2004.1462532
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2004-10-16
Publisher Place	Italy
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Optical fiber communication Microprogramming Hardware Throughput Data acquisition System testing Costs Personal communication networks Laboratories Measurement
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
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7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
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9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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