NDLI: On the Design of a Low Power Compact Spiking Neuron Cell Based on Charge-Coupled Synapses

Content Provider	IEEE Xplore Digital Library
Author	Yajie Chen Hall, S. McDaid, L. Buiu, O. Kelly, P.
Copyright Year	2006
Description	Author affiliation: Univ. of Liverpool, Liverpool (Yajie Chen; Hall, S.)
Abstract	A charge-coupled silicon synapse with a floating diffusion output is proposed as the basis for a new electronic, spiking neuron cell. The synapse is formed by a two-stage charge transfer device with the weight function stored in a floating gate over the first stage. The output of the synapses feeds into the multi-gate inputs of a MOSFET which themselves capacitively couple onto a common floating gate. This MOSFET provides a summing action and so acts as a point neuron. Thermal generation within the synaptic device, causes relaxation of the signals and this can be tailored to provide realistic postsynaptic potential (PSP) dependencies. Simulation results show that this architecture can generate a PSP that effectively mimics the spiking behaviour of real synapses. The cell is highly compact and intrinsically low power and so offers the potential for biologically plausible spiking neural networks (SNNs) in hardware.
Starting Page	1511
Ending Page	1517
File Size	212984
Page Count	7
File Format	PDF
ISBN	0780394909
DOI	10.1109/IJCNN.2006.246612
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2006-07-16
Publisher Place	Canada
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Neurons MOSFET circuits Silicon Charge coupled devices Feeds Signal generators Biological system modeling Cells (biology) Neural networks Neural network hardware
Content Type	Text
Resource Type	Article

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