NDLI: Utilizing GPGPUs for design validation with a modified Ant Colony Optimization

Content Provider	IEEE Xplore Digital Library
Author	Min Li Gent, K. Hsiao, M.S.
Copyright Year	2011
Description	Author affiliation: Bradley Department of Electrical and Computer Engineering, Virginia Tech, Blacksburg, VA 24061, USA (Min Li; Gent, K.; Hsiao, M.S.)
Abstract	In this paper, we propose a novel parallel state justification tool, GACO, utilizing Ant Colony Optimization (ACO) on Graphical Processing Units (GPU). With the high degree of parallelism supported by the GPU, GACO is capable of launching a large number of artificial ants to search for the target state. A novel parallel simulation technique, utilizing partitioned navigation tracks as guides during the search, is proposed to achieve extremely high computation efficiency for state justification. We present the results on a GPU platform from NVIDIA (a GeForce GTX 285 graphics card) that demonstrate a speedup of up to 228× compared to deterministic methods and a speedup of up to 40× over previous state-of-the-art heuristic based serial tools.
Starting Page	128
Ending Page	135
File Size	477782
Page Count	8
File Format	PDF
ISBN	9781457717444
ISSN	15526674
e-ISBN	9781457717437
DOI	10.1109/HLDVT.2011.6113988
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-11-09
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Graphics processing unit Instruction sets Logic gates Integrated circuit modeling Synchronization Computational modeling Kernel Single Instruction Multiple Threads (SIMT) Design Validation Ant Colony Optimization General Purpose Computation on Graphics Processing Unit (GPGPU) Compute Unified Device Architecture (CUDA)
Content Type	Text
Resource Type	Article

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