NDLI: A high performance broadcast design with hardware multicast and GPUDirect RDMA for streaming applications on Infiniband clusters

Content Provider	IEEE Xplore Digital Library
Author	Venkatesh, A. Subramoni, H. Hamidouche, K. Panda, D.K.
Copyright Year	2014
Description	Author affiliation: Dept. of Comput. Sci. & Eng., Ohio State Univ., Columbus, OH, USA (Venkatesh, A.; Subramoni, H.; Hamidouche, K.; Panda, D.K.)
Abstract	Several streaming applications in the field of high performance computing are obtaining significant speedups in execution time by leveraging the raw compute power offered by modern GPGPUs. This raw compute power, coupled with the high network throughput offered by high performance interconnects such as InfiniBand (IB) are allowing streaming applications to scale to rapidly. A frequently used operation that constitutes to the execution of multi-node streaming applications is the broadcast operation where data from a single source is transmitted to multiple sinks, typically from a live data site. Although high performance networks like IB offer novel features like hardware based multicast to speed up the performance of the broadcast operation, their benefits have been limited to host based applications due to the inability of IB Host Channel Adapters (HCAs) to directly access the memory of the GPGPUs. This poses a significant performance bottleneck to high performance streaming applications that rely heavily on broadcast operations from GPU memories. The recently introduced GPUDirect RDMA feature alleviates this bottleneck by enabling IB HCAs to perform data transfers directly to / from GPU memory (bypassing host memory). Thus, it presents an attractive alternative to designing high performance broadcast operations for GPGPU based high performance streaming applications. In this work, we propose a novel method for fully utilizing GPUDirect RDMA and hardware multicast features in tandem to design a high performance broadcast operation for streaming applications. The experiments conducted with the proposed design show up 60% decrease in latency and 3X-4X improvement in a throughput benchmark compared to the naive scheme on 64 GPU nodes.
Starting Page	1
Ending Page	10
File Size	718059
Page Count	10
File Format	PDF
e-ISBN	9781479959761
DOI	10.1109/HiPC.2014.7116875
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2014-12-17
Publisher Place	India
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Graphics processing units Peer-to-peer computing Hardware Reliability Receivers Random access memory Protocols
Content Type	Text
Resource Type	Article

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