NDLI: GA-based modeling of a non-ideal second order low-pass ΣΔ modulator

Content Provider	IEEE Xplore Digital Library
Author	Dendouga, A. Barra, S. Kouda, S. Yekhlef, M. Bouguechal, N.
Copyright Year	2012
Description	Author affiliation: Advanced Electronics Laboratory, Département d'Électronique, Université de Batna, 05 avenue Chahid Boukhlouf Mohamed, 05000, Algérie (Barra, S.; Kouda, S.; Yekhlef, M.; Bouguechal, N.) \|\| Microelectronic and Nanotechnology Division, Centre de Développement des Technologies Avancées (CDTA), 20 Août 1956, Baba Hassan, BP17, Algiers 16303, Algeria (Dendouga, A.)
Abstract	An approach is presented for the high-level simulation and synthesis of discrete-time modulators based on a simulation-based optimization strategy. The high-level synthesis approach determines both the optimum modulator topology and the required building block specifications, such that the system specifications mainly signal to noise ratio (SNR). A genetic-based differential evolution algorithm is used in combination with a fast dedicated behavioral simulator to realistically analyze and optimize the modulator performance. The approach has been implemented in a MATLAB Optimization tool. Simulation results are shown for both the analysis and optimization capabilities, illustrating the effectiveness of the approach. The selected range of optimized modulator topologies as a function of the modulator specifications for a wide range of values indicate the capabilities of and the performance range covered by the tool.
Starting Page	1
Ending Page	4
File Size	196487
Page Count	4
File Format	PDF
ISBN	9781467352895
e-ISBN	9781467352925
DOI	10.1109/ICM.2012.6471446
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2012-12-16
Publisher Place	Algeria
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Modulation Noise Sigma-delta modulation Genetic algorithms Switches Clocks Switching circuits switched capacitor oversampling modulators sigma delta modulator genetic algorithm
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

A 1 V second order sigma-delta modulator

A 15 Bit 95 dB Low Power Discrete Time Sigma Delta Modulator

Second order Sigma-Delta modulator realization

A 1.8 V 64.9 uW 54.1 dB SNDR $1^{st}$ order sigma-delta modulator design using clocked comparator Based Switched Capacitor technique

Modeling Op Amp Nonlinearity in Switched-Capacitor Sigma-Delta Modulators

A differential 25 Mbit/s switched-current delta-sigma modulator

Analysis and design of $2^{nd}$ order sigma-delta modulator for audio applications

Low-power low-voltage CMOS A/D sigma-delta modulator for bio-potential signals driven by a single-phase scheme

Design techniques for CMOS micropower low-voltage switched-capacitor delta-sigma modulator

GA-based modeling of a non-ideal second order low-pass ΣΔ modulator

Similar Documents

A 1 V second order sigma-delta modulator

A 15 Bit 95 dB Low Power Discrete Time Sigma Delta Modulator

Second order Sigma-Delta modulator realization

A 1.8 V 64.9 uW 54.1 dB SNDR $1^{st}$ order sigma-delta modulator design using clocked comparator Based Switched Capacitor technique

Modeling Op Amp Nonlinearity in Switched-Capacitor Sigma-Delta Modulators

A differential 25 Mbit/s switched-current delta-sigma modulator

Analysis and design of $2^{nd}$ order sigma-delta modulator for audio applications

Low-power low-voltage CMOS A/D sigma-delta modulator for bio-potential signals driven by a single-phase scheme

Design techniques for CMOS micropower low-voltage switched-capacitor delta-sigma modulator

GA-based modeling of a non-ideal second order low-pass ΣΔ modulator