NDLI: A 65nm CMOS low-power, low-voltage bandgap reference with using self-biased composite cascode opamp

Content Provider	IEEE Xplore Digital Library
Author	Koushaeian, Leila Skafidas, Stan
Copyright Year	2010
Description	Author affiliation: Centre for Telecommunications and Micro-Electronics (CTME), Melbourne, Australia (Koushaeian, Leila) \|\| Department of Electrical and Electronic, Engineering, Melbourne, Australia (Skafidas, Stan)
Abstract	In this paper, we present a low-voltage low-power CMOS bandgap voltage reference (BVR) based on the self-cascode self-biased op-amp. The current mirror mismatch error resulting from the channel length modulation (CLM) effect has also been compensated by using composite transistors. This proposed circuit, implemented in 65nm IBM CMOS process, which generates a reference of 364mV from a power supply of the 1.2V and consumed the 28 μW at room temperature. The power supply rejection ratio is greater than 60 dB for frequency below 10 kHz. The proposed bandgap achieves a temperature coefficient(TC) of 4.7ppm/°C without trimming for the temperature range(TR) from 0°C to 100°C and the 0.75mV/V of ±10% supply voltage variations.
Starting Page	95
Ending Page	98
File Size	734213
Page Count	4
File Format	PDF
ISBN	9781424485888
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2010-08-18
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Association for Computing Machinery, Inc. (ACM)
Subject Keyword	Photonic band gap Transistors CMOS integrated circuits Power supplies Gain Temperature distribution CMOS technology temperature coefficient Self-cascode bandgap voltage reference voltage reference self-biased
Content Type	Text
Resource Type	Article

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