NDLI: Matching cost computation algorithm and high speed FPGA architecture for high quality real-time Semi Global Matching stereo vision for road scenes

Content Provider	IEEE Xplore Digital Library
Author	Schumacher, F. Greiner, T.
Copyright Year	2014
Description	Author affiliation: Center for Appl. Res., Pforzheim Univ., Pforzheim, Germany (Schumacher, F.; Greiner, T.)
Abstract	Stereo correspondence and the generation of the disparity map, which encodes the depth of objects, is one of the most challenging and important tasks for camera based environment perception systems. Thus, it is indispensable for autonomous driving vehicles and transportation devices to detect other cars or for the classification of obstacles. To enable this, relatively large real world images must be processed at high data rates. At the moment, Semi Global Matching (SGM) is the most promising approach for the stereo matching of real world images at sufficient quality and the capability of high data rates. Real-time SGM implementations on small image sizes have been reported, however, current stereo camera image sizes pose still high computational complexity and memory demand for SGM. This paper describes a new method for the efficient computation of stereo matching costs to reduce the complexity and the high memory demand for cost volume and cost aggregation buffering. Using the proposed complexity reduction, we present modules and concepts for full parallel FPGA implementations of the cost volume creation, SGM aggregation and disparity selection. We evaluate the presented algorithm using the KITTI stereo vision benchmark and achieve, besides competitive quality results, a data throughput for the cost calculation of 199 frames per second (fps) for an image size of 1242 × 375 with a disparity range of D = 160 and tremendously reduced memory requirements.
Starting Page	3064
Ending Page	3069
File Size	718527
Page Count	6
File Format	PDF
ISBN	9781479960781
DOI	10.1109/ITSC.2014.6958182
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2014-10-08
Publisher Place	China
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Transforms Field programmable gate arrays Benchmark testing Stereo vision Memory management Throughput
Content Type	Text
Resource Type	Article

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