NDLI: A stability criterion for high-accuracy /spl Delta/-/spl Sigma/ digital resonators [ADC BIST applications]

Content Provider	IEEE Xplore Digital Library
Author	Macii, D. Pianegiani, F. Carbone, P. Petri, D.
Copyright Year	2004
Description	Author affiliation: Dipt. di Informatica e Telecomunicazioni, Universita degli Studi di Trento, Italy (Macii, D.; Pianegiani, F.)
Abstract	The quick evolution of integrated circuit (IC) technologies towards complex system-on-chips (SoCs) architectures has been recently promoting many research efforts aimed at reducing test-related costs. In fact, actual measurement and testing expenses of high density, mixed-signal devices may cover almost 50% of the whole production budget. A well-known strategy to cope with these problems is built-in self-test (BIST), which relies on the integration of specific testing-oriented resources directly on chip. In particular, inexpensive, high-purity harmonic resonators are essential components for an accurate and fast characterization of the analog-to-digital converters (ADC) integrated in the same device. /spl Delta/-/spl Sigma/ harmonic resonators are apt to this purpose. Nevertheless, they have also proved to be critically stable and difficult to implement due to the lack of clear design criteria. This paper propose to fill this gap by presenting a general method to analyze the behavior of /spl Delta/-/spl Sigma/ resonators. thus suggesting useful guidelines for the implementation of more stable and robust schemes.
Sponsorship	IEEE Instrumentation and Measurement Soc
Starting Page	1160
Ending Page	1164
File Size	399576
Page Count	5
File Format	PDF
ISBN	078038248X
ISSN	10915281
DOI	10.1109/IMTC.2004.1351271
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2004-05-18
Publisher Place	Italy
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Stability criteria Built-in self-test Circuit testing Circuit stability Integrated circuit technology System-on-a-chip Integrated circuit testing System testing Costs Density measurement
Content Type	Text
Resource Type	Article
Subject	Instrumentation Electrical and Electronic Engineering

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