NDLI: Using run-time reconfiguration for fault injection applications

Content Provider	IEEE Xplore Digital Library
Author	Antoni, L. Leveugle, R. Feher, B.
Copyright Year	2001
Description	Author affiliation: Inst. Nat. Polytech. de Grenoble, France (Antoni, L.)
Abstract	In this paper, approaches using run-time reconfiguration for fault injection in programmable systems are introduced. In FPGA-based systems an important characteristic is the time to reconfigure the hardware, including re-synthesis, place and route and finally bitstream downloading. Modifications can be carried out at "low-level", directly in the bitstream, so that re-synthesizing the description can be avoided to inject new faults. Moreover, with some FPGA families (e.g. Virtex or AT6000), it is possible to reconfigure the hardware partially at run-time. Important time-savings can be achieved when taking advantage of these features. These characteristics fit well to apply with fault injection where the injection necessitates the reconfiguration of only a few resources of the device with a few modifications. Time gains can be various depending on the number and kind of faults to be injected and the device used for the experiments. The experiments show that his approach could be several orders faster than the implementation using Compile-Time Reconfiguration.
Sponsorship	IEEE Instrum. & Meas. Soc.
Starting Page	1773
Ending Page	1777
File Size	504889
Page Count	5
File Format	PDF
ISBN	0780366468
ISSN	10915281
DOI	10.1109/IMTC.2001.929505
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2001-05-21
Publisher Place	Hungary
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Runtime Circuit faults Hardware Prototypes Field programmable gate arrays Application software Laboratories Informatics Information systems Postal services
Content Type	Text
Resource Type	Article
Subject	Instrumentation Electrical and Electronic Engineering

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