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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Crawford, C.H. Padkowski, P. Baranski, T. Czubak, A. Raszka, L. |
| Copyright Year | 2015 |
| Description | Author affiliation: IBM Res. Krakow, Krakow, Poland (Padkowski, P.; Baranski, T.; Czubak, A.; Raszka, L.) || IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA (Crawford, C.H.) |
| Abstract | With the introduction of low power System on a Chip (SoC) processor architectures in enterprise server configurations, there is a growing need to develop the software that will support scale-out, data intensive cloud applications that are deployed in data centers today. In this paper, we describe the design and implementation of a low latency user space fully compliant TCP/IP socket stack on a low power System on a Chip (SoC) architecture and demonstrate that this library can become the basis for “Big Data” applications that require both high throughput and low latency capabilities all on a power optimized system platform. For our work, we are specifically targeting cloud applications that are developed on runtimes which are seeing great growth in programmer communities and enterprise deployment as well as for which the I/O bottlenecks outweigh the compute requirements, e.g. memcached. On low-power embedded-class SoC servers, these I/O bottlenecks can be prohibitively expensive for performance and scaling requirements of such applications, even when the CPU efficiency and memory bandwidth are adequate. Our approach removes this bottleneck by leveraging available SoC integrated Network Interface Cards (NICs) as well as user space communication - thereby improving pathlength to data as well as preserving CPU cycles from context switching. Our experiments show that we can achieve sub 5 μsec ping-pong latency for 8B packets, and also provide substantive improvement to the memslap benchmark not just when compared to memcached running on the T4240 with the kernel stack (3.5 times better for 16B SETs) but also when compared to a standard x86_64 server with ConnectX 10GbE adapters when power based metrics are used (close to a factor of 2 improvement with power normalized metrics). |
| Starting Page | 1 |
| Ending Page | 6 |
| File Size | 783262 |
| Page Count | 6 |
| File Format | |
| e-ISBN | 9781467392860 |
| DOI | 10.1109/HPEC.2015.7322441 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2015-09-15 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Fast networking User space drivers Networking offload Wire speed Servers DPAA User space sockets Linux QorIQ Computer architecture Benchmark testing Low latency Hardware IP networks Low power networking Kernel |
| Content Type | Text |
| Resource Type | Article |
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