Please wait, while we are loading the content...
Please wait, while we are loading the content...
| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Xi'ning Cui Jingwei Yang |
| Copyright Year | 2012 |
| Description | Author affiliation: School of Computer Science and Technology, Xidian University, Xi'an, China (Xi'ning Cui) || School of Computer Science and Engineering, Beihang University, Beijing, China (Jingwei Yang) |
| Abstract | As the networks have been broadly used everywhere such as national defense, military, bank and so on, security of data transported on network has become a hot issue. Public key cryptographic algorithms are widely applied in network communication. RSA has been used for a long time as a traditional public key cryptographic system, but it seems not able to meet user's higher security demands. In recent years, ECC(Elliptic Curve Cryptography) has been adopted more and more broadly because of its highest security of the same length bit. In addition, it also has the advantage of less computation overheads, less bandwidth demand and so on. The speed of encryption and decryption of ECC is greatly affected by point multiplication, which is very time-consuming. In this study, an FPGA(Field Programmable Gate Array) based processor is implemented for ECC, which parallelizes the computing of ECC at bit-level and gains a considerable speed-up. The ECC processor is fully implemented with hardware which supports key length of 113-bit, 163-bit and 193-bit. Algorithms suitable for hardware implementation are applied to make the processor more efficient. There are four kinds of unit in the processor: arithmetic logic unit, controlling unit, and input/output system. The units communicate with each other thought bus in FPGA device. |
| Starting Page | 343 |
| Ending Page | 349 |
| File Size | 600668 |
| Page Count | 7 |
| File Format | |
| ISBN | 9781467314107 |
| e-ISBN | 9781467314114 |
| DOI | 10.1109/CSIP.2012.6308865 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2012-08-24 |
| Publisher Place | China |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Processor FPGA Elliptic curve cryptography Elliptic Curve Cryptography Point multiplication Equations |
| Content Type | Text |
| Resource Type | Article |
National Digital Library of India (NDLI) is a virtual repository of learning resources which is not just a repository with search/browse facilities but provides a host of services for the learner community. It is sponsored and mentored by Ministry of Education, Government of India, through its National Mission on Education through Information and Communication Technology (NMEICT). Filtered and federated searching is employed to facilitate focused searching so that learners can find the right resource with least effort and in minimum time. NDLI provides user group-specific services such as Examination Preparatory for School and College students and job aspirants. Services for Researchers and general learners are also provided. NDLI is designed to hold content of any language and provides interface support for 10 most widely used Indian languages. It is built to provide support for all academic levels including researchers and life-long learners, all disciplines, all popular forms of access devices and differently-abled learners. It is designed to enable people to learn and prepare from best practices from all over the world and to facilitate researchers to perform inter-linked exploration from multiple sources. It is developed, operated and maintained from Indian Institute of Technology Kharagpur.
Learn more about this project from here.
NDLI is a conglomeration of freely available or institutionally contributed or donated or publisher managed contents. Almost all these contents are hosted and accessed from respective sources. The responsibility for authenticity, relevance, completeness, accuracy, reliability and suitability of these contents rests with the respective organization and NDLI has no responsibility or liability for these. Every effort is made to keep the NDLI portal up and running smoothly unless there are some unavoidable technical issues.
Ministry of Education, through its National Mission on Education through Information and Communication Technology (NMEICT), has sponsored and funded the National Digital Library of India (NDLI) project.
| Sl. | Authority | Responsibilities | Communication Details |
|---|---|---|---|
| 1 | Ministry of Education (GoI), Department of Higher Education |
Sanctioning Authority | https://www.education.gov.in/ict-initiatives |
| 2 | Indian Institute of Technology Kharagpur | Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project | https://www.iitkgp.ac.in |
| 3 | National Digital Library of India Office, Indian Institute of Technology Kharagpur | The administrative and infrastructural headquarters of the project | Dr. B. Sutradhar bsutra@ndl.gov.in |
| 4 | Project PI / Joint PI | Principal Investigator and Joint Principal Investigators of the project |
Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon |
| 5 | Website/Portal (Helpdesk) | Queries regarding NDLI and its services | support@ndl.gov.in |
| 6 | Contents and Copyright Issues | Queries related to content curation and copyright issues | content@ndl.gov.in |
| 7 | National Digital Library of India Club (NDLI Club) | Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach | clubsupport@ndl.gov.in |
| 8 | Digital Preservation Centre (DPC) | Assistance with digitizing and archiving copyright-free printed books | dpc@ndl.gov.in |
| 9 | IDR Setup or Support | Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops | idr@ndl.gov.in |
|
Loading...
|