NDLI: Design and Comparison of Regularize Modified Booth Multiplier Using Different Adders

Content Provider	IEEE Xplore Digital Library
Author	Bipin Sakshi
Copyright Year	2013
Description	Author affiliation: ECE Dept., Thapar Univ., Patiala, India (Bipin; Sakshi)
Abstract	The conventional Modified Booth Encoding (MBE) generates n/2+1 rows instead of n/2 rows and also irregular partial product (PP) array because of the extra neg (sign bit) bit at the lower significant bit (LSB) position of each partial product row. In this, a simple approach has been proposed to generate n/2 partial product rows along with regular partial product arrays, thereby reducing the area and power of MBE multipliers [2]. Here technique to find direct 2's complement has been added to last partial product row in order to reduce partial product rows to n/2. Partial products have been regularized by adding LSB of the partial product row with neg bit. Along with this to generate final result different adders have been used and compared. Ripple carry adder, carry lookahed adder and carry select adder have been used in third and final step. Carry select adder shown significant improvement in delay compared to carry lookahed adder and ripple carry adder.
Starting Page	387
Ending Page	391
File Size	368510
Page Count	5
File Format	PDF
ISBN	9780769550138
DOI	10.1109/ICMIRA.2013.82
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2013-12-21
Publisher Place	India
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Algorithm design and analysis Conferences Two's Complement Signal processing algorithms Digital signal processing Modified Booth Algorithm Multiplier Delays Arrays Adders Partial Product
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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