NDLI: Electrostatic design of vertical tunneling field-effect transistors

Content Provider	IEEE Xplore Digital Library
Author	Teherani, J.T. Tao Yu Antoniadis, D.A. Hoyt, J.L.
Copyright Year	2013
Description	Author affiliation: Microsyst. Technol. Labs., Massachusetts Inst. of Technol., Cambridge, MA, USA (Teherani, J.T.; Tao Yu; Antoniadis, D.A.; Hoyt, J.L.)
Abstract	Tunneling field-effect transistors (TFETs) have created excitement for their potential to overcome the 60 mV/decade thermal limit of the subthreshold swing for conventional devices enabling lower power electronics. However, as shown in the TFET review by Seabaugh and Zhang [1], experimental subthreshold characteristics have not achieved the steepness of theoretical predictions. Possible explanations for the non-abrupt turn-on of experimental devices include long band-tails (exacerbated by doping) that extend into the semiconductor band gap, mid-gap and interface trap-states, inhomogeneity of the semiconductor composition, strain and/or thickness, and non-optimal electrostatic design of the transistor structure. This paper focuses on improving the electrostatic design of vertical tunneling structures (where tunneling occurs vertically toward the gate), in order to better experimental turn-on characteristics.
Sponsorship	IEEE
Starting Page	1
Ending Page	2
File Size	509557
Page Count	2
File Format	PDF
ISBN	9781479933723
DOI	10.1109/E3S.2013.6705872
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2013-10-28
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Switches Materials Tunneling Logic gates Transistors Electrostatics Electric fields
Content Type	Text
Resource Type	Article

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