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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Tomioka, K. Fukui, T. |
| Copyright Year | 2013 |
| Description | Author affiliation: Grad. Sch. of Inf. Sci. & Technol., Hokkaido Univ., Sapporo, Japan (Tomioka, K.; Fukui, T.) |
| Abstract | Main target in future LSI is to achieve low power consumption while enhancing performance. There are many concerns to lower the power consumption in recent CMOS technologies, such as multi-gate architecture for suppressing short-channel effect and OFF-state leakage current. The state-of-the-art FET offered by the gate structure surely reduces the power dissipation, but the power-scaling will be limited by FET in itself since the reduction in supply voltage in Si-based MOSFETs has some difficulties, such as low carrier mobility under lower electrical field and physically limited subthreshold slope (SS). Especially, utilization of steep subthreshold-slope transistor such as tunnel FETs (TFETs) and impact ionization FETs is important for the low power circuits because physical limitation due to carrier thermal diffusion stops a scaling of the power consumption even if the multi-gate structure and III-Vs are utilized. Thus, another channel materials and transport mechanisms should be addressed mutually in CMOS technologies, and these distinct features should possess good compatibility with the Si-based CMOS. In this regard, heterojunctions formed across the III-V nanowire (NW) and Si would be promising building blocks for the future extended CMOS technologies. Here, we present integration of III-V nanowires on Si by selective-area growth and concept for steep SS transistor using III-V nanowire/Si heterojunctions. |
| Sponsorship | IEEE |
| Starting Page | 1 |
| Ending Page | 2 |
| File Size | 395701 |
| Page Count | 2 |
| File Format | |
| ISBN | 9781479933723 |
| DOI | 10.1109/E3S.2013.6705870 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2013-10-28 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Power demand Switches Heterojunctions CMOS technology Silicon CMOS integrated circuits Transistors |
| Content Type | Text |
| Resource Type | Article |
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