NDLI: Low-temperature buffer AlInAs/GaInAs on InP HEMT technology for ultra-high-speed integrated circuits

Content Provider	IEEE Xplore Digital Library
Author	Brown, A.S. Chou, C.S. Delaney, M.J. Hooper, C.E. Jensen, J.F. Larson, L.E. Mishra, U.K. Nguyen, L.D. Thompson, M.S.
Copyright Year	1989
Description	Author affiliation: Hughes Res. Lab., Malibu, CA, USA (Brown, A.S.; Chou, C.S.; Delaney, M.J.; Hooper, C.E.; Jensen, J.F.; Larson, L.E.; Mishra, U.K.; Nguyen, L.D.; Thompson, M.S.)
Abstract	A report is presented on the development of a planar low-temperature buffer AlInAs/GaInAs on InP high-electron-mobility transistor (HEMT) technology for use in digital and analog integrated circuits. This technology is attractive for circuit applications because of the high achievable f/sub T/ and f/sub max/, low output conductance and gate leakage current, and reduced susceptibility to backgating effects. Two alternative logic families-UFL and SCFL (source-couple FET logic)-were chosen for the realization of digital circuits. Measurements on the UFL ring oscillators exhibited a minimum gate delay of 13 ps with a power dissipation of 1.1 mW/gate at room temperature. The gate delay rose to 25 ps when the power dissipation increased to 3 mW/gate. This gate delay is expected to drop significantly with reductions in diode level-shift series resistance and improvements in transistor f/sub T/. The most complex SCFL circuit tested was a divide-by-eight counter. The SCFL circuits were configured as flip-flops in the divide-by-eight mode. The circuit operated at a maximum clock rate of 12.5 GHz.<>
Starting Page	143
Ending Page	146
File Size	393581
Page Count	4
File Format	PDF
DOI	10.1109/GAAS.1989.69313
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1989-10-22
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Integrated circuit technology Logic circuits HEMTs Leakage current Power dissipation Circuit testing MODFETs Indium phosphide Delay Analog integrated circuits
Content Type	Text
Resource Type	Article

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