NDLI: An accurate power model for GPU processors

Content Provider	IEEE Xplore Digital Library
Author	Qiyao Xie Tian Huang Zhihai Zou Liang Xia Yongxin Zhu Jiang Jiang
Copyright Year	2012
Description	Author affiliation: Sch. of Microelectron., Shanghai Jiao Tong Univ., Shanghai, China (Qiyao Xie; Tian Huang; Zhihai Zou; Liang Xia; Yongxin Zhu; Jiang Jiang)
Abstract	Albeit general purpose graphics processing unit (GPU) processor has gained strong momentums in high performance computing domain recently, power consumption stays as the critical constraint in GPU architectures. Among many efforts dedicated to power reduction, most existing power analytical models can achieve sufficient estimate accuracy for a new GPU architecture only after its layout or floor plan is finalized, when it is usually too late for software designers working on the new GPU architecture. This paper presents an accurate power model based on GPU native instructions to analyze and estimate the power consumption at an architecture level. Taking the latest FERMI GPU architecture as an illustrative example to apply our methods, our model is comprised of two parts, i.e. the computing section and the memory section. With an integrated view of the GPU architecture, our model is able to estimate the power consumption for the GPU architecture under a series of workloads with deviations less than 15%. To the best of our knowledge, our model should outperform all existing analytical GPU power models in terms of accuracy.
Sponsorship	IEEE Korea Council
Starting Page	1141
Ending Page	1146
File Size	788665
Page Count	6
File Format	PDF
ISBN	9781467308946
e-ISBN	9788994364223
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2012-12-03
Publisher Place	South Korea
Access Restriction	Subscribed
Rights Holder	AICIT
Subject Keyword	GPU architecture Power model Native instructions
Content Type	Text
Resource Type	Article

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