NDLI: HNCP-II: A 16-core 65nm microprocessor ASIC for image processing algorithms

Content Provider	IEEE Xplore Digital Library
Author	Boussadi, M.A. Tixier, T. Landrault, A. Derutin, J.-P.
Copyright Year	2014
Description	Author affiliation: Inst. Pascal, UBP, Aubiere, France (Boussadi, M.A.; Tixier, T.; Landrault, A.; Derutin, J.-P.)
Abstract	In many video and image processing applications, complexity has reached a point where the performance requirements can no longer be supported by standard architectures based on a single processor. This is why many systems are based on multiprocessor architecture. In this paper, we present HNCP-II a 16-core flexible distributed memory ASIC dedicated to embedded application field (image processing applications). Connected through a torus on-chip network, each tile of the overall system includes an open-source RISC processor, a floating point unit, a video management module and a set of built in hardware features for multicore communication. This specific hardware enables to meet most relevant overall parallelism scheme (parallel skeletons) thanks to software-configurable modules. Results are presented for two image processing algorithms in term of execution time, speedup and efficiency. Area, power and timing performance of the synthesized ASIC are given for a CMOS 65nm technology node.
Starting Page	1
Ending Page	7
File Size	889529
Page Count	7
File Format	PDF
ISBN	9781479958108
DOI	10.1109/ReCoSoC.2014.6861347
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2014-05-26
Publisher Place	France
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Application specific integrated circuits Computer architecture Skeleton Hardware Topology Field programmable gate arrays Clocks
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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