NDLI: Residue Signed-Digit Arithmetic and the Conversions between Residue and Binary Numbers for a Four-Moduli Set

Content Provider	IEEE Xplore Digital Library
Author	Shugang Wei Changjun Jiang
Copyright Year	2012
Abstract	By introducing a signed-digit (SD) number arithmetic into a residue number system (RNS), arithmetic operations can be performed efficiently. In this paper, a high-speed modulo m SD addition algorithm is proposed, where m\in \{2^n-1, 2^n+1, 2^{2n}+1, 2^n\}. By using the modulo m SD adders, a modulo m SD multiplier can be implemented with a binary adder tree structure. We also present an algorithm for the conversion from residue SD numbers to SD numbers for the four-moduli set \{2^n-1, 2^n+1, 2^{2n}+1, 2^n\} which can be designed using a two-level binary tree structure of the residue SD number additions. The comparison of the new converter using SD number arithmetic with the converter using binary arithmetic yields reductions in delays of 44\%, 60\% and 75\% for n=4, n=8 and n=16, respectively.
Starting Page	436
Ending Page	440
File Size	284555
Page Count	5
File Format	PDF
ISBN	9781467326308
DOI	10.1109/DCABES.2012.100
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2012-10-19
Publisher Place	China
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Computers Number conversion Residue number systemu Signal processing algorithms Binary trees Residue arithmetic Dynamic range Hardware Signed-digit number sysytem Adders Delay
Content Type	Text
Resource Type	Article

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Residue Signed-Digit Arithmetic and the Conversions between Residue and Binary Numbers for a Four-Moduli Set