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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Charbon, E. Malavasi, E. Pandini, D. Sangiovanni-Vincentelli, A. |
| Copyright Year | 1994 |
| Description | Author affiliation: Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA (Charbon, E.) |
| Abstract | Techniques are presented for simultaneous placement and module optimization for analog ICs. An algorithmic approach to module generation provides alternative sets of modules, optimized with respect to performance but with different trade-offs among area, parasitics and matching. A simulated annealing algorithm performs the placement, selecting among the available configurations the one that best fulfils all performance and geometric requirements. Compared to standard approaches, the flexibility of placement is considerably increased, thus allowing the enforcement of tighter specifications.< |
| Starting Page | 525 |
| Ending Page | 528 |
| File Size | 515998 |
| Page Count | 4 |
| File Format | |
| ISBN | 0780318862 |
| DOI | 10.1109/CICC.1994.379668 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 1994-05-01 |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Analog integrated circuits Analog circuits Circuit synthesis Capacitance Space technology Analog computers Solid modeling Simulated annealing Design automation Circuit topology |
| Content Type | Text |
| Resource Type | Article |
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