NDLI: High-frequency performance of graphene field effect transistors with saturating IV-characteristics

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2015 IEEE International Electron Devices Meeting (IEDM)

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2011 International Electron Devices Meeting

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The evolution of scaling from the homogeneous era to the heterogeneous era

Approach toward achieving sustainable mobility

Extended scalability and functionalities of MRAM based on thermally assisted writing

High-frequency performance of graphene field effect transistors with saturating IV-characteristics

Graphene technology with inverted-T gate and RF passives on 200 mm platform

Assessment of graphene nanomesh and nanoroad transistors by chemical modification

Is graphene contacting with metal still graphene?

Electrically switchable graphene photo-sensor using phase-change gate filter for non-volatile data storage application with high-speed data writing and access

A novel low aspect-ratio Si nano-hemisphere surface texturing scheme for ultrathin film solar cells

PRAM cell technology and characterization in 20nm node size

A low power phase change memory using thermally confined TaN/TiN bottom electrode

Highly productive PCRAM technology platform and full chip operation: Based on $4F^{2}$ (84nm pitch) cell scheme for 1 Gb and beyond

A high performance phase change memory with fast switching speed and high temperature retention by engineering the GexSbyTez phase change material

Drift-resilient cell-state metric for multilevel phase-change memory

Thermally-assisted Ti/Pr0.7Ca0.3MnO3 ReRAM with excellent switching speed and retention characteristics

Quantized conductive filament formed by limited Cu source in sub-5nm era

Architecting advanced technologies for 14nm and beyond with 3D FinFET transistors for the future SoC applications

Novel VTH self-adjusting MISFET with SiN charge trap layer for ultra low power LSI

A 600MHz MTJ-based nonvolatile latch making use of incubation time in MTJ switching

Phase change memory as synapse for ultra-dense neuromorphic systems: Application to complex visual pattern extraction

Device circuit co-design using classical and non-classical III–V Multi-Gate Quantum-Well FETs (MuQFETs)

Overcoming carbon nanotube variations through co-optimized technology and circuit design

Performance limits of superlattice-based steep-slope nanowire FETs

A simulation study of strain induced performance enhancements in InAs nanowire Tunnel-FETs

Two-dimensional quantum mechanical modeling of band-to-band tunneling in indirect semiconductors

Statistical variability and reliability in nanoscale FinFETs

A unified 3D device simulation of random dopant, interface trap and work function fluctuations on high-к/metal gate device

Self-heating induced feedback effect on drain current mismatch and its modeling

Transistor matching and silicon thickness variation in ETSOI technology

3D-carrier profiling in FinFETs using scanning spreading resistance microscopy

Direct two-dimensional electrostatic potential cross-sectional mapping of sub-30-nm MOSFET under operation mode using electron holography

Time-dependent variability of high-k based MOS devices: Nanoscale characterization and inclusion in circuit simulators

Unexpected failure during HBM ESD stress in nanometer-scale nLDMOS-SCR devices

Investigation of stress induced voiding and electromigration phenomena on direct copper bonding interconnects for 3D integration

High density 3D LSI technology using W/Cu hybrid TSVs

3D copper TSV integration, testing and reliability

Spatial variation of TSV capacitance and method of stabilization with Al2O3-induced negative fixed charge at the silicon-liner interface

Advances, challenges and opportunities in 3D CMOS sequential integration

Highly reliable BEOL-transistor with oxygen-controlled InGaZnO and Gate/Drain offset design for high/low voltage bridging I/O operations

Carbon-based interconnect: Performance, scaling and reliability of 3D stacked multilayer graphene system

A novel bottom-up Ag contact (30nm diameter and 6.5 aspect ratio) technology by electroplating for 1Xnm and beyond technology

SRAM, NAND, DRAM contact hole patterning using block copolymer directed self-assembly guided by small topographical templates

Extremely-low-noise CMOS Image Sensor with high saturation capacity

High performance 300mm backside illumination technology for continuous pixel shrinkage

A 1.4µm front-side illuminated image sensor with novel light guiding structure consisting of stacked lightpipes

Investigation of Dark Current Random Telegraph Signal in Pinned PhotoDiode CMOS Image Sensors

A CMOS compatible Ge-on-Si APD operating in proportional and Geiger modes at infrared wavelengths

Enhanced angle sensitive pixels for light field imaging

A 192×108 pixel ToF-3D image sensor with single-tap concentric-gate demodulation pixels in 0.13 µm technology

A middle-1X nm NAND flash memory cell (M1X-NAND) with highly manufacturable integration technologies

Scaling feasibility study of planar thin floating gate (FG) NAND Flash devices and size effect challenges beyond 20nm

A new disturb free programming scheme in scaled NAND Flash memory

Embedded Flash technologies and their applications: Status & outlook

Scalability of split-gate charge trap memories down to 20nm for low-power embedded memories

Abnormal VTH/VFB shift caused by as-grown mobile charges in Al2O3 and its impacts on Flash memory cell operations

Demonstration of memory string with stacked junction-less SONOS realized on vertical silicon nanowire

Recent advances in thermoelectrics

Process challenges of MEMS harvesters and their effect on harvester performance

Ultra low power microsystems using RF energy scavenging (invited)

Research in self-powered electronic systems

Energy harvesting and implantable medical devices - first order selection criteria

Modeling all spin logic: Multi-magnet networks interacting via spin currents

Ultimate device scaling: Intrinsic performance comparisons of carbon-based, InGaAs, and Si field-effect transistors for 5 nm gate length

Ferroelectric negative capacitance MOSFET: Capacitance tuning & antiferroelectric operation

Nanodevices in Flatland: Two-dimensional graphene-based transistors with high Ion/Ioff ratio

Role of dissipative quantum transport in DC, RF, and self-heating characteristics of short channel graphene FETs

Geometries and electronic structures of graphene adsorbed on SiO2 (0001) surfaces: The possibility of electronic structure tuning by an insulating substrate

Simulation of graphene nanoscale RF transistors including scattering and generation/recombination mechanisms

Understanding the conduction and switching mechanism of metal oxide RRAM through low frequency noise and AC conductance measurement and analysis

Conducting mechanism of atom switch with polymer solid-electrolyte

Physical mechanisms of endurance degradation in TMO-RRAM

Statistical characterization of current paths in narrow poly-Si channels

Explore physical origins of resistance drift in phase change memory and its implication for drift-insensitive materials

Reliability perspectives for high density PRAM manufacturing

Advancing CMOS beyond the Si roadmap with Ge and III/V devices

High transconductance self-aligned gate-last surface channel In0.53Ga0.47As MOSFET

High drain current (>2A/mm) InGaAs channel MOSFET at VD=0.5V with shrinkage of channel length by InP anisotropic etching

Enhancement technologies and physical understanding of electron mobility in III–V n-MOSFETs with strain and MOS interface buffer engineering

Performance enhancement of p-channel InGaAs quantum-well FETs by superposition of process-induced uniaxial strain and epitaxially-grown biaxial strain

fT = 688 GHz and fmax = 800 GHz in Lg = 40 nm In0.7Ga0.3As MHEMTs with gm_max > 2.7 mS/µm

A novel Silicon-On-Quartz (SOQ) device for optical mobile applications

Highly sensitive and reliable X-ray detector with HgI2 photoconductor and oxide drive TFT

Dual gate photo-thin film transistor with high photoconductive gain for high reliability, and low noise flat panel transparent imager

Sheet-type organic active matrix amplifier system using Vth-tunable, pseudo-CMOS circuits with floating-gate structure

Single-grain Si TFTs using spin-coated liquid-silicon

Temperature dependent electron transport in amorphous oxide semiconductor thin film transistors

A new candidate for high performance transparent electronic circuits: Sol-gel based SnO2/ZrO2 thin film transistors

Bulk planar 20nm high-k/metal gate CMOS technology platform for low power and high performance applications

Improving the energy/power constraint for technology optimization

CMOS device design and optimization from a perspective of circuit-level energy-delay optimization

Technology roadmaps and low power SoC design

Assessment of fully-depleted planar CMOS for low power complex circuit operation

Design-friendly scalability of cost-effective 28LP technology platform featuring $2^{nd}$ generation gate-first HK/MG transistors without eSiGe

Technology-circuit convergence for full-SOC platform in 28 nm and beyond

Ultra low power: Emerging devices and their benefits for integrated circuits

Self-depleted T-gate Schottky barrier tunneling FET with low average subthreshold slope and high ION/IOFF by gate configuration and barrier modulation

Complementary thin-base symmetric lateral bipolar transistors on SOI

Experimental evidence of increased deformation potential at MOS interface and its impact on characteristics of ETSOI FETs

First demonstration of ultrathin body c-SiGe channel FDSOI pMOSFETs combined with SiGe(:B) RSD: Drastic improvement of electrostatics (Vth,p tuning, DIBL) and transport (μ0, Isat) properties down to 23nm gate length

GeSn technology: Extending the Ge electronics roadmap

High-mobility germanium-tin (GeSn) P-channel MOSFETs featuring metallic source/drain and sub-370 °C process modules

Impact of atomistic doping and 3D electrostatics on the variability of RTN time constants in flash memories

Filamentary-switching model in RRAM for time, energy and scaling projections

On the stochastic nature of resistive switching in metal oxide RRAM: Physical modeling, monte carlo simulation, and experimental characterization

Oxide-based RRAM: Unified microscopic principle for both unipolar and bipolar switching

Comprehensive physical modeling of forming and switching operations in HfO2 RRAM devices

Numerical analysis of domain wall propagation for dense memory arrays

Impact of TDDB in MG/HK devices on circuit functionality in advanced CMOS technologies

Influence of charge trapping on failure detection and its distributions for nFET high-κ stacks

Improved high-k/metal gate lifetime via improved SILC understanding and mitigation

Fundamental aspects of HfO2-based high-k metal gate stack reliability and implications on tinv-scaling

Superior NBTI reliability of SiGe channel pMOSFETs: Replacement gate, FinFETs, and impact of Body Bias

Low frequency noise variability in high-k/metal gate stack 28nm bulk and FD-SOI CMOS transistors

Deeply-scaled self-aligned-gate GaN DH-HEMTs with ultrahigh cutoff frequency

Impact of GaN channel scaling in InAlN/GaN HEMTs

W-band power performance of AlGaN/GaN DHFETs with regrown n+ GaN ohmic contacts by MBE

Physics of fluorine plasma ion implantation for GaN normally-off HEMT technology

Electroluminescence analysis of time-dependent reverse-bias degradation of HEMTs: A complete model

Si Trench Around Drain (STAD) technology of GaN-DHFETs on Si substrate for boosting power performance

High Performance pMEMS™ oscillators - The next generation frequency references

Ovenized high frequency oscillators based on aluminum nitride contour-mode MEMS resonators

Gallium nitride-on-silicon micromechanical overtone resonators and filters

Platform for JFET-based sensing of RF MEMS resonators in CMOS technology

Switchable wide tuning range bandstop filters for frequency-agile radios

A metal micromechanical resonant switch for on-chip power applications

Carbon nanotube electronics - Materials, devices, circuits, design, modeling, and performance projection

Air-stable technique for fabricating n-type carbon nanotube FETs

High device yield carbon nanotube NFETs for high-performance logic applications

Systematic understanding of self-heating effects in tri-gate nanowire MOSFETs considering device geometry and carrier transport

Comprehensive analysis of Ion variation in metal gate FinFETs for 20nm and beyond

New understanding of the statistics of random telegraph noise in Si nanowire transistors - the role of quantum confinement and non-stationary effects

Sub-10 nm carbon nanotube transistor

Record high RF performance for epitaxial graphene transistors

Extended scalability of perpendicular STT-MRAM towards sub-20nm MTJ node

Racetrack Memory: A high-performance, low-cost, non-volatile memory based on magnetic domain walls

Racetrack memory cell array with integrated magnetic tunnel junction readout

High-density charge storage on molecular thin films - candidate materials for high storage capacity memory cells

Ferroelectricity in hafnium oxide: CMOS compatible ferroelectric field effect transistors

Multi-functional universal device using a band-engineered vertical structure

A high-performance, high-density 28nm eDRAM technology with high-K/metal-gate

Device-circuit interactions in extremely low voltage CMOS designs (invited)

Measuring threshold voltage variability of 10G transistors

Chip-level power-performance optimization through thermally-driven across-chip variation (ACV) reduction

Towards the systematic study of aging induced dynamic variability in nano-MOSFETs: Adding the missing cycle-to-cycle variation effects into device-to-device variation

Drain current variability and MOSFET parameters correlations in planar FDSOI technology

New layout dependency in high-k/Metal Gate MOSFETs

NexFET generation 2, new way to power

GaN-based multi-junction diode with low reverse leakage current using P-type barrier controlling layer

Photon-recycling GaN p-n diodes demonstrating temperature-independent, extremely low on-resistance

Integrated power design platform based on modeling dynamic behavior of GaN devices

High performance SiC trench devices with ultra-low ron

Novel SiC power MOSFET with integrated unipolar internal inverse MOS-channel diode

Positive bias temperature instability degradation of InGaAs n-MOSFETs with Al2O3 gate dielectric

Impact of Fermi level pinning inside conduction band on electron mobility of InxGa1−xAs MOSFETs and mobility enhancement by pinning modulation

Understanding temperature acceleration for NBTI

Analytic modeling of the bias temperature instability using capture/emission time maps

Hot-carrier to cold-carrier device lifetime modeling with temperature for low power 40nm Si-bulk NMOS and PMOS FETs

Silicide barrier engineering induced random telegraph noise in 1Xnm CMOS contacts

Fundamental origin of excellent low-noise property in 3D Si-MOSFETs ∼ Impact of charge-centroid in the channel due to quantum effect on 1/f noise ∼

A manufacturable dual channel (Si and SiGe) high-k metal gate CMOS technology with multiple oxides for high performance and low power applications

ALD beryllium oxide: Novel barrier layer for high performance gate stacks on Si and high mobility substrates

1-nm-thick EOT high mobility Ge n- and p-MOSFETs with ultrathin GeOx/Ge MOS interfaces fabricated by plasma post oxidation

Material potential and scalability challenges of germanium CMOS

A novel atomic layer oxidation technique for EOT scaling in gate-last high-к/metal gate CMOS technology

Dual-channel technology with cap-free single metal gate for high performance CMOS in gate-first and gate-last integration

Experimental and theoretical study of electrode effects in HfO2 based RRAM

Tri-axial MEMS gyroscopes and Six Degree-Of-Freedom Motion Sensors

Inkjet-printed micro-electro-mechanical switches

VLSI silicon multi-gas analyzer coupling gas chromatography and NEMS detectors

Micro-hydraulic structure for high performance bio-mimetic air flow sensor arrays

Shock induced energy harvesting with a MEMS harvester for automotive applications

A MEMS-based wideband piezoelectric energy harvester system using mechanical stoppers

The present status and the future of the atomic switch

Highly reliable, complementary atom switch (CAS) with low programming voltage embedded in Cu BEOL for Nonvolatile Programmable Logic

Energy efficient programming of nanoelectronic synaptic devices for large-scale implementation of associative and temporal sequence learning

Quantum transport in deterministically implanted single-donors in Si FETs

Integration of nanoelectromechanical (NEM) relays with silicon CMOS with functional CMOS-NEM circuit

Experimental demonstration and analysis of DNA passage in nanopore-based nanofluidic transistors

Complementary switching in metal oxides: Toward diode-less crossbar RRAMs

Self-rectifying and forming-free unipolar HfOx based-high performance RRAM built by fab-avaialbe materials

Challenges and opportunities for HfOX based resistive random access memory

Demonstration of high-density ReRAM ensuring 10-year retention at 85°C based on a newly developed reliability model

Multi-level 40nm WOX resistive memory with excellent reliability

$10×10nm^{2}$ Hf/HfOx crossbar resistive RAM with excellent performance, reliability and low-energy operation

One selector-one resistor (1S1R) crossbar array for high-density flexible memory applications

Realization of vertical resistive memory (VRRAM) using cost effective 3D process

Dynamic behavior of SRAM data retention and a novel transient voltage collapse technique for 0.6V 32nm LP SRAM

Evaluation methodology for random telegraph noise effects in SRAM arrays

Advanced channel engineering achieving aggressive reduction of VT variation for ultra-low-power applications

Comprehensive analysis of UTB GeOI logic circuits and 6T SRAM cells considering variability and temperature sensitivity

Exploration of device-circuit interactions in FinFET-based memories for sub-15nm technologies using a mixed mode quantum simulation framework: Atoms to systems

Correlative analysis between characteristics of 30-nm LG FinFETs and SRAM performance

Electrostatics improvement in 3-D tri-gate over ultra-thin body planar InGaAs quantum well field effect transistors with high-K gate dielectric and scaled gate-to-drain/gate-to-source separation

First experimental demonstration of gate-all-around III–V MOSFETs by top-down approach

Vertical In0.7Ga0.3As nanowire surrounding-gate transistors with high-k gate dielectric on Si substrate

Schottky source/drain Al2O3/InAlN/GaN MIS-HEMT with steep sub-threshold swing and high ON/OFF current ratio

Demonstration of MOSFET-like on-current performance in arsenide/antimonide tunnel FETs with staggered hetero-junctions for 300mV logic applications

Fabrication, characterization, and physics of III–V heterojunction tunneling Field Effect Transistors (H-TFET) for steep sub-threshold swing

On the feasibility of spherical harmonics expansions of the Boltzmann transport equation for three-dimensional device geometries

Large-signal mm-wave InAlN/GaN HEMT power amplifier characterization through self-consistent Harmonic Balance / Cellular Monte Carlo device simulation

Analysis of dopant diffusion and defects in SiGe channel Quantum Well for Laser annealed device using an atomistic kinetic Monte Carlo approach

Modeling of NMOS performance gains from edge dislocation stress

Impact of back end stress on SiGe bipolar transistors

Thermal-aware device design of nanoscale bulk/SOI FinFETs: Suppression of operation temperature and its variability

Hardware-assisted 3D TCAD for predictive capacitance extraction in 32nm SOI SRAMs

Compact capacitance and capacitive coupling-noise modeling of Through-Oxide Vias in FDSOI based ultra-high density 3-D ICs

MOVPE III–V material growth on silicon substrates and its comparison to MBE for future high performance and low power logic applications

Nearly defect-free Ge gate-all-around FETs on Si substrates

High performance Si.45Ge.55 Implant Free Quantum Well FET featuring low temperature process, eSiGe stressor and transversal strain relaxation

A new Ge2Sb2Te5 (GST) liner stressor featuring stress enhancement due to amorphous-crystalline phase change for sub-20 nm p-channel FinFETs

300mm FinFET results utilizing conformal, damage free, ultra shallow junctions (Xj∼5nm) formed with molecular monolayer doping technique

High performance n-MOS finFET by damage-free, conformal extension doping

Novel technique to engineer aluminum profile at nickel-silicide/Silicon:Carbon interface for contact resistance reduction, and integration in strained N-MOSFETs with silicon-carbon stressors

Automated single molecule selection

CMOS-based biosensors with an independent double-gate FinFET

High efficiency radial-junction Si nanohole solar cells formed by self-assembling high aspect ratio plasma etching

Si/Si1−xGex nanopillar superlattice solar cell: A novel nanostructured solar cell for overcoming the Shockley-Queisser limit

Bifacial CIGS (11% efficiency)/Si solar cells by Cd-free and sodium-free green process integrated with CIGS TFTs

Novel heterojunction solar cells with conversion efficiencies approaching 21% on p-type crystalline silicon substrates

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High-frequency performance of graphene field effect transistors with saturating IV-characteristics

Content Provider	IEEE Xplore Digital Library
Author	Meric, I. Dean, C.R. Shu-Jen Han Lei Wang Jenkins, K.A. Hone, J. Shepard, K.L.
Copyright Year	2011
Description	Author affiliation: IBM T.J. Watson Research Center, Yorktown Heights, NY 10598, USA (Shu-Jen Han; Jenkins, K.A.) \|\| Department of Mechanical Engineering, Columbia University, New York, 10027, USA (Lei Wang; Hone, J.) \|\| Department of Electrical Engineering, Columbia University, New York, 10027, USA (Meric, I.; Dean, C.R.; Shepard, K.L.)
Abstract	High-frequency performance of graphene field-effect transistors (GFETs) with boron-nitride gate dielectrics is investigated. Devices show saturating IV characteristics and fmax values as high as 34 GHz at 600-nm channel length. Bias dependence of fT and fmax and the effect of the ambipolar channel on transconductance and output resistance are also examined.
File Size	1175678
File Format	PDF
ISBN	9781457705069
ISSN	2156017X
e-ISBN	9781457705052
e-ISBN	9781457705045
DOI	10.1109/IEDM.2011.6131472
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-12-05
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Logic gates Performance evaluation Transistors Current measurement Contact resistance Dielectrics Radio frequency
Content Type	Text
Resource Type	Article

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