NDLI: Increasing Channel Margin of Distorted Serial Systems

Content Provider	IEEE Xplore Digital Library
Author	Patel, P. Cases, M. de Araujo, D. Brunker, D. Oeanessvan, G. Hemken, T.
Copyright Year	2006
Description	Author affiliation: IBM (Patel, P.; Cases, M.; de Araujo, D.)
Abstract	This paper introduces high-speed packaging designers to a broadly adaptable performance assessment tool designed to establish and demonstrate the operating margin of channels and channel features in 10 Gb/s serial systems. An interactive hardware tool is described that enables comparison of reference channel performance with that of selectively degraded channels and associated channel construction features. These degraded-performance channels are capable of incorporating a full set of critical channel parameters: backplane, daughter cards, active and passive devices including connectors and construction features necessary to support transmission. Any of these elements can degrade the performance of the entire channel. The performance of the channel or channel feature is then assessed under varying channel conditions by monitoring silicon response and used to establish a functional operating margin
Sponsorship	IEEE Microwave Theory and Techniques Soc. IEEE Components, Packaging and Manuf. Techol. Soc
Starting Page	15
Ending Page	18
File Size	4214837
Page Count	4
File Format	PDF
ISBN	1424406684
DOI	10.1109/EPEP.2006.321179
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2006-10-23
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Degradation Backplanes Hardware Connectors Packaging Silicon Testing Condition monitoring Performance loss Insertion loss
Content Type	Text
Resource Type	Article

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