NDLI: Power sensitivity of low-voltage CMOS current-mode circuits

Content Provider	IEEE Xplore Digital Library
Author	Fei Yuan
Copyright Year	2004
Description	Author affiliation: Dept. of Electr. & Comput. Eng., Ryerson Polytech. Univ., Toronto, Ont., Canada (Fei Yuan)
Abstract	This paper proposes an analytical method for analysis of the power sensitivity of low-voltage CMOS current-mode circuits. The power sensitivity is analyzed using the transfer function from the supply voltage to the biasing currents at both low and high frequencies. We show that conventional voltage-mode circuits are sensitive to switching noise and are therefore not particularly suitable for gigabit per second serial links where timing jitter is critical to BER of the links. Current-mode circuits, on the other hand, exhibit much less power sensitivity. We further show that cascode techniques are effective in reducing the power sensitivity of low-voltage CMOS current-mode circuits. Several current-controlled oscillators are implemented using TSMC 0.18 /spl mu/m CMOS technology and analyzed using Spectre with BSIM3.3 device models. Simulation results are presented.
Sponsorship	Cisco Syst. General Elec. Ryerson Univ. AVFX Audio Visual Bell Canada Dofasco Dye & Durham Gennum Corp. IEEE Canada Found. Univ. of Toronto Niagara College of Appl. Arts and Technol
Starting Page	1741
Ending Page	1744
File Size	322001
Page Count	4
File Format	PDF
ISBN	0780382536
ISSN	08407789
DOI	10.1109/CCECE.2004.1349751
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2004-05-02
Publisher Place	Canada
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Current mode circuits Voltage CMOS technology Transfer functions Frequency Switching circuits Circuit noise Timing jitter Bit error rate Oscillators
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering Hardware and Architecture

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