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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | del Alamo, J.A. Kim, D.H. |
| Copyright Year | 2007 |
| Description | Author affiliation: Massachusetts Inst. of Technol., Cambridge (del Alamo, J.A.; Kim, D.H.) |
| Abstract | This talk will discuss the general issues associated with III-V CMOS that are enunciated above. It will also describe the authors' research activities in the area of InGaAs HEMTs for logic. In particular, we will summarize the findings of a recent scaling study of InGaAs HEMTs down to 60 nm in gate length [1]. In this work, we fabricated HEMTs with a 70% InAs composition in the channel and with varying gate lengths and InAIAs barrier thicknesses (from 11 to 3 nm). This study resulted in devices that have substantially more current drive than state-of-the-art 65 nm CMOS at a voltage of 0.5 V. It also showed that InGaAs HEMTs scale according to a simple electrostatics law similar to fully-depleted SOI MOSFETs. Our research reveals that HEMTs are excellent test vehicles to study topics of great relevance to future III-V MISFETs, such as self-aligned device architectures, scaling limit of planar devices, impact of strain on transport physics, and the consequences of a low density of states on current drive of deeply scaled devices.. |
| Starting Page | 201 |
| Ending Page | 202 |
| File Size | 844125 |
| Page Count | 2 |
| File Format | |
| ISBN | 9781424411016 |
| ISSN | 15483770 |
| DOI | 10.1109/DRC.2007.4373717 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2007-06-18 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Indium gallium arsenide CMOS logic circuits CMOS technology HEMTs MODFETs III-V semiconductor materials Voltage Electrostatics MOSFETs Automatic testing |
| Content Type | Text |
| Resource Type | Article |
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