NDLI: A silicon carbide self-aligned and ion implanted static induction transistor (SAI-SIT) for 150 watt S-Band operation

Content Provider	IEEE Xplore Digital Library
Author	Knight, T.J. Clarke, R.C. Barron, R.R. Ostop, J.A. Morick, B.A. Gigante, J.R. Malkowski, W.J. Morse, A.W. DeSalvo, G.C. Petrosky, K.J. Curtice, W.R.
Copyright Year	2002
Description	Author affiliation: Northrop Grumman Corp, Baltimore, MD, USA (Knight, T.J.; Clarke, R.C.; Barron, R.R.; Ostop, J.A.; Morick, B.A.; Gigante, J.R.; Malkowski, W.J.; Morse, A.W.; DeSalvo, G.C.; Petrosky, K.J.)
Abstract	The Static Induction Transistor (SIT) has proven itself as an appropriate device to take full advantage of the high breakdown field strength, thermal conductivity, and electron velocity characteristics of silicon carbide. Microwave SITs using metal Schottky gates have been fabricated by several groups. For example, L-Band Schottky SITs with over 900 W of output power and 60% efficiency have been demonstrated. However, in order to achieve power gain at 3.0 GHz, more stringent geometric and alignment tolerances are required. At the same time, reaching 150 Watts at S-Band requires that the tight dimensional constraints be maintained across the expanse of large devices. A novel type of Static Induction Transistor fabricated in 4H-silicon carbide, described here for the first time, relies on self-aligned oxide isolation spacers between the source and an implanted gate.
Starting Page	179
Ending Page	180
File Size	111209
Page Count	2
File Format	PDF
ISBN	0780373170
DOI	10.1109/DRC.2002.1029586
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2002-06-24
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Silicon carbide Scanning electron microscopy Thermal conductivity Voltage Nickel Silicides Fingers Power transistors Contracts Microwave transistors
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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