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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Lin Li Vijaykrishnan, N. Kandemir, M. Irwin, M.J. |
| Copyright Year | 2004 |
| Description | Author affiliation: Dept. of Comput. Sci. & Eng., Pennsylvania State Univ., University Park, PA, USA (Lin Li; Vijaykrishnan, N.; Kandemir, M.; Irwin, M.J.) |
| Abstract | Crosstalk between wires, caused by increased capacitive coupling, is considered one of the major factors that affect the performance of interconnects such as buses. The data-dependent nature of crosstalk-induced delays necessitates bus cycle time to be designed for the worst case crosstalk. However, this pessimism incurs a significant performance penalty. Consequently, we propose a crosstalk aware interconnect that uses a faster clock and dynamically controls the number of cycles required for transmission based on the estimated delay of the data pattern to be transmitted. In order to accomplish this, we designed a crosstalk analyzer circuit that is incorporated into the sender side of the bus and support a variable cycle transmission mechanism. We evaluate the effectiveness of the proposed scheme focusing on the on-chip buses of a microprocessor and by using the SPEC2000 benchmarks. The experimental results show that the proposed approach improves performance by 31.5% as compared to the original pessimistic approach. Furthermore, we employ a coding optimization to enhance the effectiveness of the proposed approach. We also show that the proposed scheme is an area-efficient approach to improving performance as compared to other crosstalk reduction schemes. |
| Sponsorship | EDAA, EDA Consortium, IEEE Comput. Soc. TTTC IEEE Comput. Soc. DATC ECSI ACM/SIGDA RAS |
| Starting Page | 102 |
| Ending Page | 107 |
| File Size | 266949 |
| Page Count | 6 |
| File Format | |
| ISBN | 0769520855 |
| ISSN | 15301591 |
| DOI | 10.1109/DATE.2004.1268834 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2004-02-16 |
| Publisher Place | France |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Crosstalk Wire Integrated circuit interconnections Propagation delay Dynamic voltage scaling Error correction Delay estimation Data communication Computer science Couplings |
| Content Type | Text |
| Resource Type | Article |
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