NDLI: Real-time speech compression with a VLSI vector quantization processor

Content Provider	IEEE Xplore Digital Library
Author	Davidson, G. Stanhope, T. Aravind, R. Gersho, A.
Copyright Year	1985
Description	Author affiliation: University of California, Santa Barbara, CA (Davidson, G.)
Abstract	Vector Quantization is an attractive block coding scheme which allows more efficient use of a given channel capacity. The computational complexity of the codebook search, however, limits the practical applications of Vector Quantization -- especially in real-time situations. This paper presents a special purpose processing architecture which supports real-time search of large codebooks. The core of the computation required for a squared-error distortion measure is accomplished using a VLSI pattern matching chip. We describe a pipeline architecture which reduces the effective computation time for a single vector component to one period. The chip supports a selectable vector dimension of 2, 4, 8, or 8 and can be used with any codebook size consistent with the input vector rate and the chip's throughput. We have built and tested a 4-micron NMOS chip which supports up to four million squared-error distance calculations per second. We outline three approaches to real-time Vector quantization which use this chip to do the pattern matching: two waveform coding processors using Vector Pulse Code Modulation and Adaptive Vector Predictive Coding, and a novel approach to rapid codebook design.
Starting Page	1437
Ending Page	1440
File Size	144712
Page Count	4
File Format	PDF
DOI	10.1109/ICASSP.1985.1168093
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1985-04-26
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Speech processing Very large scale integration Vector quantization Computer architecture Pattern matching Pulse modulation Block codes Channel capacity Computational complexity Distortion measurement
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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