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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Ganote, M.D. |
| Copyright Year | 1989 |
| Description | Author affiliation: Modern Technol. Corp., Dayton, OH, USA (Ganote, M.D.) |
| Abstract | The 16-bit avionics computer is based on a MIL-STD-1750A instruction set architecture (ISA). The author discusses differences between MIL-STD-1750A and 32-bit commercial central processing units (CPU). The 32-bit processors proved to have better performance than the MIL-STD-1750A processors and are the only ones that really meet the complex mission requirements of the immediate future. He proposes three ways to get the best performance at the lowest life-cycle cost, namely, the use of Ada, standard hardware interfacing, and very-high-speed integrated circuits (VHSIC) hardware descriptive language (VHDL). It is argued that when these are used in an informed manner, 32-bit processors will start to deliver what computers have promised but not yet delivered. Future support will be more cost-effective, allowing easier modifications and upgrades.< |
| Starting Page | 652 |
| Ending Page | 657 |
| File Size | 759720 |
| Page Count | 6 |
| File Format | |
| DOI | 10.1109/NAECON.1989.40279 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 1989-05-22 |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Aerospace electronics Central Processing Unit Costs Very high speed integrated circuits Application software Computer architecture Computer aided instruction Instruction sets Hardware Aerospace industry |
| Content Type | Text |
| Resource Type | Article |
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