NDLI: The metallic nickel inserted p/sup -//p/sup +/ Si substrate used for RF crosstalk reduction in mixed signal ICs

Content Provider	IEEE Xplore Digital Library
Author	Xi Zhang Kyuchul Chong Ya-Hong Xie King-Ning Tu
Copyright Year	2005
Description	Author affiliation: Dept. of Mater. Sci. & Eng., California Univ., Los Angeles, CA, USA (Xi Zhang; Kyuchul Chong; Ya-Hong Xie; King-Ning Tu)
Abstract	A novel approach for 3-dimensional substrate impedance engineering of p/sup -//p/sup +/ Si substrate was studied for mixed-signal integrated circuit applications. For enhanced radio frequency (RF) crosstalk isolation, a highly conductive region analogous to a moat was inserted in the substrate between the noise producing and noise sensitive circuits to serve as grounded shields. Electroless plating was used to metallize the macroporous silicon moat etched beforehand within the p/sup -//p/sup +/ substrate to isolate electromagnetic interference and provide "true ground" contacts. The electroless plating was conducted in a concentrated aqueous solution containing Ni/sup 2+/ and NH/sup 4/F. Metallic Ni was rapidly deposited without using a reducing agent or any activation treatment at a slightly elevated temperature. After certain immersion duration, the initially single crystalline Si sidewall of the pores was completely modified by the polycrystalline metallic Ni while the original one-dimensional straight pore structure was still maintained. Thus a highly conductive porous structure was obtained in the substrate and RF crosstalk was reduced to the level limited by that across the air gap between the measurement probes. This technique offers further improvement with regard to RF crosstalk via substrate on the isolation effect achieved by high impedance through-the-wafer porous Si.
Starting Page	187
Ending Page	192
File Size	5495586
Page Count	6
File Format	PDF
ISBN	0780390857
ISSN	15505723
e-ISBN	0780390865
DOI	10.1109/ISAPM.2005.1432075
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2005-03-16
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Nickel Crosstalk Radio frequency Impedance Integrated circuit noise Mixed analog digital integrated circuits Metallization Silicon Etching Electromagnetic interference
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in