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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Potkonjak, M. Dey, S. Iqbal, Z. Parker, A.C. |
| Copyright Year | 1993 |
| Description | Author affiliation: NEC USA, Princeton, NJ, USA (Potkonjak, M.; Dey, S.) |
| Abstract | Retiming, algebraic and redundancy manipulation transformations are widely used in both the high level synthesis and the compilers fields. We present a new approach on how these powerful transformations can be applied to improve the performance of embedded systems, by optimizing their latency and throughput. A simple modification is sufficient to adapt both the Leiserson-Saxe retiming algorithm and the recently introduced ERB algorithm for the new task. We introduce a new negative retiming technique and the algorithm which coordinates this technique with both algebraic and redundancy manipulation techniques for latency optimization. The effectiveness of all discussed techniques is demonstrated on a set of "real-life" examples. Latency and throughput are improved by factors of 7.06 and 2.83 respectively, often with minimal or no additional hardware overhead.< |
| Starting Page | 498 |
| Ending Page | 504 |
| File Size | 604309 |
| Page Count | 7 |
| File Format | |
| ISBN | 0818642300 |
| DOI | 10.1109/ICCD.1993.393326 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 1993-10-03 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Embedded system Delay Control systems Throughput Embedded computing High level synthesis Telecommunication computing Costs Computational modeling Biology computing |
| Content Type | Text |
| Resource Type | Article |
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