NDLI: High-precision computation: Applications and challenges [Keynote I]

Content Provider	IEEE Xplore Digital Library
Author	Bailey, D.H.
Copyright Year	2013
Description	Author affiliation: Lawrence Berkeley National Laboratory, CA, USA (Bailey, D.H.)
Abstract	Summary form only given, as follows. High-precision floating-point arithmetic software, ranging from "double-double" or "quad" precision to arbitrarily high-precision (hundreds or thousands of digits), has been available for years. Such facilities are standard features of Mathematica and Maple, and software packages such as MPFR, QD and ARPREC are available on the Internet. Some of these packages include high-level language interface modules that make conversion of standard-precision programs a relatively simple task. However, until recently such facilities were widely considered as novelty items - why would anyone need such exalted levels of numeric precision in "practical" research or engineering? In fact, during the past decade or two, numerous applications have arisen for high-precision floatingpoint arithmetic. This presentation will briefly describe some of these applications, which mostly arise in mathematical physics, applied physics and mathematics. Many heretofore unknown identities and relationships have been discovered, and features have been identified in computed data that were not "visible" with ordinary 64-bit precision. Applications of double-double (31 digits) or quad-double precision (62 digits) are particularly common, but there are also some interesting applications for as high as 50,000 digits. The speaker will also outline what is needed in improved facilities for high-precision computation to address challenges that lie ahead.
Starting Page	3
Ending Page	3
File Size	118891
Page Count	1
File Format	PDF
ISBN	9781467356442
ISSN	10636889
DOI	10.1109/ARITH.2013.39
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2013-04-07
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Content Type	Text

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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