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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Reilly, M.H. Sopka, J.R. |
| Copyright Year | 1988 |
| Description | Author affiliation: Digital Equipment Corp., Maynard, MA, USA (Reilly, M.H.; Sopka, J.R.) |
| Abstract | An overview is given of the M31, a custom-designed, large-scale multiprocessor VAX for support of research and experimentation in the area of parallel processing. It is a shared-memory design with all processors having equal access to all physically available memory over a common bus. A description is given of the fast backplane interconnect, a major innovation of the M31 design. Also discussed are the processor/cache module, memory subsystem, instrumentation hardware, and software development.< |
| Starting Page | 200 |
| Ending Page | 206 |
| File Size | 518094 |
| Page Count | 7 |
| File Format | |
| ISBN | 0818608285 |
| DOI | 10.1109/CMPCON.1988.4859 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 1988-02-29 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Large-scale systems Parallel processing Hardware CMOS technology Monitoring Process design Probes Technological innovation Clocks Microprocessors |
| Content Type | Text |
| Resource Type | Article |
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